Difference between revisions of "intel/xeon bronze/3204"

	Edit Values
	Xeon Bronze 3204
	General Info
Designer	Intel
Manufacturer	Intel
Model Number	3204
Market	Server, Workstation
Introduction	2019 (announced); 2019 (launched)
Shop	Amazon
	General Specs
Family	Xeon Bronze
Series	3000
Locked	Yes
Frequency	1,900 MHz
Clock multiplier	19
	Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Cascade Lake
Platform	Purley
Chipset	Lewisburg
Core Name	Cascade Lake SP
Core Family	6
Process	14 nm
Technology	CMOS
Word Size	64 bit
Cores	6
Threads	6
	Multiprocessing
Max SMP	2-Way (Multiprocessor)
	Electrical
TDP	85 W
Tcase	0 °C – 78 °C
	Packaging
	Template:packages/intel/fclga-3647

Revision as of 11:29, 22 February 2019

Xeon Bronze 3204 is a 64-bit hexa-core x86 dual-socket entry-level server and workstation microprocessor set to be introduced by Intel in early 2019. The Bronze 3204, which is based on the Cascade Lake microarchitecture and is manufactured on a 14 nm process sports 1 AVX-512 FMA unit as well as two Ultra Path Interconnect links. This microprocessor, which operates at 1.9 GHz with a TDP of 85 W, supports up ? GiB of hexa-channel DDR4-2133 ECC memory.

Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.

Cache

Main article: Cascade Lake § Cache

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

384 KiB

393,216 B
0.375 MiB

L1I$	192 KiB 196,608 B 0.188 MiB	6x32 KiB	8-way set associative
L1D$	192 KiB 196,608 B 0.188 MiB	6x32 KiB	8-way set associative	write-back

L2$

6 MiB

6,144 KiB
6,291,456 B
0.00586 GiB

		6x1 MiB	16-way set associative	write-back

L3$

8.25 MiB

8,448 KiB
8,650,752 B
0.00806 GiB

		6x1.375 MiB	11-way set associative	write-back

Memory controller

[Edit/Modify Memory Info]

Integrated Memory Controller

Max Type	DDR4-2133
Supports ECC	Yes
Max Mem	768 GiB
Controllers	2
Channels	6
Max Bandwidth	95.37 GiB/s 97,658.88 MiB/s 102.403 GB/s 102,402.758 MB/s 0.0931 TiB/s 0.102 TB/s
Bandwidth	Single 15.89 GiB/s Double 31.79 GiB/s Quad 63.58 GiB/s Hexa 95.37 GiB/s

Expansions

[Edit/Modify Expansions Info]

Expansion Options

PCIe

Revision	3.0
Max Lanes	48
Configs	x16, x8, x4

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX	MMX Extension
EMMX	Extended MMX Extension
SSE	Streaming SIMD Extensions
SSE2	Streaming SIMD Extensions 2
SSE3	Streaming SIMD Extensions 3
SSSE3	Supplemental SSE3
SSE4.1	Streaming SIMD Extensions 4.1
SSE4.2	Streaming SIMD Extensions 4.2
AVX	Advanced Vector Extensions
AVX2	Advanced Vector Extensions 2
AVX-512	Advanced Vector 512-bit
AVX512F	AVX-512 Foundation
AVX512CD	AVX-512 Conflict Detection
AVX512BW	AVX-512 Byte and Word
AVX512DQ	AVX-512 Doubleword and Quadword Instructions
AVX512VL	AVX-512 Vector Length
ABM	Advanced Bit Manipulation
BMI1	Bit Manipulation Instruction Set 1
BMI2	Bit Manipulation Instruction Set 2
FMA3	3-Operand Fused-Multiply-Add
AES	AES Encryption Instructions
RdRand	Hardware RNG
ADX	Multi-Precision Add-Carry
CLMUL	Carry-less Multiplication Extension
F16C	16-bit Floating Point Conversion

x86-16	16-bit x86
x86-32	32-bit x86
x86-64	64-bit x86
Real	Real Mode
Protected	Protected Mode
SMM	System Management Mode
FPU	Integrated x87 FPU
NX	No-eXecute
EIST	Enhanced SpeedStep Technology
SST	Speed Shift Technology
TXT	Trusted Execution Technology (SMX)
vPro	Intel vPro
VT-x	VT-x (Virtualization)
VT-d	VT-d (I/O MMU virtualization)
EPT	Extended Page Tables (SLAT)
TSX	Transactional Synchronization Extensions
VMD	Volume Management Device
NM	Node Manager
KPT	Key Protection Technology
PTT	Platform Trust Technology
MBE Ctrl	Mode-Based Execute Control

Revision as of 14:19, 19 February 2019 (edit) David (talk \| contribs) ← Older edit		Revision as of 11:29, 22 February 2019 (edit) (undo) David (talk \| contribs) Newer edit →
Line 36:		Line 36:


−	{{unknown features}	+	{{unknown features}}

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Xeon Bronze 3204 - Intel#io +
base frequency	1,900 MHz (1.9 GHz, 1,900,000 kHz) +
chipset	Lewisburg +
clock multiplier	19 +
core count	6 +
core family	6 +
core name	Cascade Lake SP +
designer	Intel +
family	Xeon Bronze +
first announced	2019 +
first launched	2019 +
full page name	intel/xeon bronze/3204 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has advanced vector extensions 512	true +
has ecc memory support	true +
has extended page tables support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions +
has intel enhanced speedstep technology	true +
has intel speed shift technology	true +
has intel trusted execution technology	true +
has intel vpro technology	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	384 KiB (393,216 B, 0.375 MiB) +
l1d$ description	8-way set associative +
l1d$ size	192 KiB (196,608 B, 0.188 MiB) +
l1i$ description	8-way set associative +
l1i$ size	192 KiB (196,608 B, 0.188 MiB) +
l2$ description	16-way set associative +
l2$ size	6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) +
l3$ description	11-way set associative +
l3$ size	8.25 MiB (8,448 KiB, 8,650,752 B, 0.00806 GiB) +
ldate	2019 +
main image	+
manufacturer	Intel +
market segment	Server + and Workstation +
max case temperature	351.15 K (78 °C, 172.4 °F, 632.07 °R) +
max cpu count	2 +
max memory bandwidth	95.37 GiB/s (97,658.88 MiB/s, 102.403 GB/s, 102,402.758 MB/s, 0.0931 TiB/s, 0.102 TB/s) +
max memory channels	6 +
max pcie lanes	48 +
microarchitecture	Cascade Lake +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
model number	3204 +
name	Xeon Bronze 3204 +
platform	Purley +
process	14 nm (0.014 μm, 1.4e-5 mm) +
series	3000 +
smp max ways	2 +
supported memory type	DDR4-2133 +
tdp	85 W (85,000 mW, 0.114 hp, 0.085 kW) +
technology	CMOS +
thread count	6 +
word size	64 bit (8 octets, 16 nibbles) +

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas