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Difference between revisions of "arm holdings/microarchitectures/cortex-a9"
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=== Key changes from {{\\|Cortex-A8}} ===
 
=== Key changes from {{\\|Cortex-A8}} ===
 
* Fully synthesizable RTL (prior designs were hand/automated layout)
 
* Fully synthesizable RTL (prior designs were hand/automated layout)
 +
 +
== Licensees ==
 +
Arm named the following companies as licensees.
 +
 +
{{collist
 +
|count = 3
 +
|
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* [[Broadcom]]
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* [[Corporation]]
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* [[Freescale]]
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* [[NEC]]
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* [[Electronics]]
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* [[nVIDIA]]
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* [[STMicroelectronics]]
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* [[Texas]]
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* [[Instruments]]
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* [[Toshiba]]
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* [[Mindspeed]]
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* [[Technologies]]
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* [[ZiiLABS]]
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* [[Open-Silicon]]
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* [[eSilicon]]
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* [[Altera]]
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* [[Xilinx]]
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}}

Revision as of 20:32, 30 December 2018

Edit Values
Cortex-A9 µarch
General Info
Arch TypeCPU
DesignerARM Holdings
ManufacturerTSMC
IntroductionOctober 3, 2007
Process40 nm
Succession

Cortex-A9 is the successor to the Cortex-A8, a low-power performance ARM microarchitecture designed by ARM Holdings for the mobile market. This microarchitecture is designed as a synthesizable IP core and is sold to other semiconductor companies to be implemented in their own chips.

The Cortex-A9 was later succeeded by four independent lines - high-performance (A15), mainstream performance (A12), high efficiency (A7), and ultra-low power (A5).

Architecture

Key changes from Cortex-A8

  • Fully synthesizable RTL (prior designs were hand/automated layout)

Licensees

Arm named the following companies as licensees.

codenameCortex-A9 +
designerARM Holdings +
first launchedOctober 3, 2007 +
full page namearm holdings/microarchitectures/cortex-a9 +
instance ofmicroarchitecture +
manufacturerTSMC +
microarchitecture typeCPU +
nameCortex-A9 +
process40 nm (0.04 μm, 4.0e-5 mm) +