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Difference between revisions of "nec/microarchitectures/sx-aurora"
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'''SX-Aurora''' is [[NEC]]'s successor to the {{\\|SX-ACE}}, a [[16 nm]] microarchitecture for [[vector processors]] first introduced in [[2018]].
 
'''SX-Aurora''' is [[NEC]]'s successor to the {{\\|SX-ACE}}, a [[16 nm]] microarchitecture for [[vector processors]] first introduced in [[2018]].
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== History ==
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{{empty section}}
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== Architecture ==
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=== Key changes from {{\\|SX-ACE}} ===
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{{empty section}}
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== Block Diagram ==
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{{empty section}}
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== Memory Hierarchy ==
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=== Overview ==
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== Vector engine (VE) card ==
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== Die ==
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{{empty section}}
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== Bibliography ==
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* {{hcbib|30}}
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* Supercomputing 2018, NEC Aurora Forum
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* ''Some information was obtained directly from NEC''

Revision as of 21:49, 23 November 2018

Edit Values
SX-Aurora µarch
General Info
Arch TypeVPU
DesignerNEC
ManufacturerTSMC
Introduction2018
Core Configs8
Pipeline
TypeSuperscalar, Pipelined
OoOEYes
SpeculativeYes
Reg RenamingYes
Stages8
Decode4-way
Cache
L1I Cache32 KiB/core
L1D Cache32 KiB/core
L2 Cache256 KiB/core
L3 Cache16 MiB/chip
Succession

SX-Aurora is NEC's successor to the SX-ACE, a 16 nm microarchitecture for vector processors first introduced in 2018.

History

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Architecture

Key changes from SX-ACE

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Block Diagram

New text document.svg This section is empty; you can help add the missing info by editing this page.

Memory Hierarchy

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= Overview

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Vector engine (VE) card

New text document.svg This section is empty; you can help add the missing info by editing this page.

Die

New text document.svg This section is empty; you can help add the missing info by editing this page.

Bibliography

  • Template:hcbib
  • Supercomputing 2018, NEC Aurora Forum
  • Some information was obtained directly from NEC