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Difference between revisions of "intel/core i9/i9-9820x"
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Revision as of 20:23, 11 October 2018

Edit Values
Core i9-9820X
skylake x (front).png
General Info
DesignerIntel
ManufacturerIntel
Model Numberi9-9820X
Part NumberBX80673I99820X,
BXC80673I99820X
MarketDesktop
IntroductionOctober 8, 2018 (announced)
November, 2018 (launched)
Release Price$898 (tray)
ShopAmazon
General Specs
FamilyCore i9
Seriesi9-9000
LockedNo
Frequency3,300 MHz
Turbo Frequency4,100 MHz (1 core),
4,100 MHz (2 cores)
Bus typeDMI 3.0
Bus rate4 × 8 GT/s
Clock multiplier33
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSkylake (server)
PlatformBasin Falls Refresh
ChipsetLewisburg
Core NameSkylake X Refresh
Core Family6
Process14 nm
TechnologyCMOS
Word Size64 bit
Cores10
Threads20
Max Memory128 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP165 W
Tjunction0 °C – 92 °C
Tstorage-25 °C – 125 °C
Packaging
Template:packages/intel/lga-2066

Core i9-9820X is a 64-bit deca-core high-performance x86 desktop microprocessor introduced by Intel in late 2018. This chip, which is based on the Skylake microarchitecture, is fabricated on Intel's 14 nm process. The i9-9820X operates at 3.3 GHz with a TDP of 165 W and a Turbo Boost frequency of up to 4.1 GHz. The processor supports up to 128 GiB of quad-channel DDR4-2666 memory.

In addition to its Turbo Boost frequency, the i9-9820X has a Turbo Max frequency of 4.2 GHz.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$640 KiB
655,360 B
0.625 MiB
L1I$320 KiB
327,680 B
0.313 MiB
10x32 KiB8-way set associative 
L1D$320 KiB
327,680 B
0.313 MiB
10x32 KiB8-way set associativewrite-back
L2$10 MiB
10,240 KiB
10,485,760 B
0.00977 GiB
  10x1 MiB16-way set associativewrite-back
L3$16.5 MiB
16,896 KiB
17,301,504 B
0.0161 GiB
  12x1.375 MiB11-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2666
Supports ECCNo
Max Mem128 GiB
Channels4
Max Bandwidth79.47 GiB/s
81,377.28 MiB/s
85.33 GB/s
85,330.263 MB/s
0.0776 TiB/s
0.0853 TB/s
Bandwidth
Single 19.89 GiB/s
Double 39.72 GiB/s
Quad 79.47 GiB/s

Expansions

[Edit/Modify Expansions Info]

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Expansion Options
PCIeRevision: 3.0
Max Lanes: 44
Configuration: x16, x8, x4


Graphics

This processor has no integrated graphics.

Features

[Edit/Modify Supported Features]

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Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
AVX-512Advanced Vector 512-bit (2 Units)
AVX512FAVX-512 Foundation
AVX512CDAVX-512 Conflict Detection
AVX512BWAVX-512 Byte and Word
AVX512DQAVX-512 Doubleword and Quadword Instructions
AVX512VLAVX-512 Vector Length
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
TBMT 3.0Turbo Boost Max Technology 3.0
EISTEnhanced SpeedStep Technology
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i9/i9-9820x&oldid=83299"
Facts about "Core i9-9820X - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i9-9820X - Intel#pcie +
base frequency3,300 MHz (3.3 GHz, 3,300,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
chipsetLewisburg +
clock multiplier33 +
core count10 +
core family6 +
core nameSkylake X Refresh +
designerIntel +
familyCore i9 +
first announcedOctober 8, 2018 +
first launchedNovember 2018 +
full page nameintel/core i9/i9-9820x +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has advanced vector extensions 512true +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Turbo Boost Max Technology 3.0 +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions +
has intel enhanced speedstep technologytrue +
has intel turbo boost max technology 3 0true +
has intel turbo boost technology 2 0true +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multiplierfalse +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size640 KiB (655,360 B, 0.625 MiB) +
l1d$ description8-way set associative +
l1d$ size320 KiB (327,680 B, 0.313 MiB) +
l1i$ description8-way set associative +
l1i$ size320 KiB (327,680 B, 0.313 MiB) +
l2$ description16-way set associative +
l2$ size10 MiB (10,240 KiB, 10,485,760 B, 0.00977 GiB) +
l3$ description11-way set associative +
l3$ size16.5 MiB (16,896 KiB, 17,301,504 B, 0.0161 GiB) +
ldate3000 +
main imageFile:skylake x (front).png +
manufacturerIntel +
market segmentDesktop +
max cpu count1 +
max junction temperature365.15 K (92 °C, 197.6 °F, 657.27 °R) +
max memory131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory bandwidth79.47 GiB/s (81,377.28 MiB/s, 85.33 GB/s, 85,330.263 MB/s, 0.0776 TiB/s, 0.0853 TB/s) +
max memory channels4 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureSkylake (server) +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberi9-9820X +
nameCore i9-9820X +
number of avx-512 execution units2 +
part numberBX80673I99820X + and BXC80673I99820X +
platformBasin Falls Refresh +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 898.00 (€ 808.20, £ 727.38, ¥ 92,790.34) +
release price (tray)$ 898.00 (€ 808.20, £ 727.38, ¥ 92,790.34) +
seriesi9-9000 +
smp max ways1 +
supported memory typeDDR4-2666 +
tdp165 W (165,000 mW, 0.221 hp, 0.165 kW) +
technologyCMOS +
thread count20 +
turbo frequency (1 core)4,100 MHz (4.1 GHz, 4,100,000 kHz) +
turbo frequency (2 cores)4,100 MHz (4.1 GHz, 4,100,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +