Difference between revisions of "cavium/microarchitectures/vulcan"

	Edit Values
	Vulcan µarch
	General Info
Arch Type	CPU
Designer	Broadcomm, Cavium
Manufacturer	TSMC
Introduction	2018
Process	16 nm
Core Configs	16, 20, 24, 28, 30, 32
	Pipeline
Type	Superscalar, Superpipeline
OoOE	Yes
Speculative	Yes
Reg Renaming	Yes
Stages	13-15
Decode	4-way
	Instructions
ISA	ARMv8.1
Extensions	NEON
	Cache
L1I Cache	32 KiB/core; 8-way set associative
L1D Cache	32 KiB/core; 8-way set associative
L2 Cache	256 KiB/core; 8-way set associative
L3 Cache	1 MiB/core

Revision as of 16:05, 28 May 2018

Vulcan is a 16 nm high-performance 64-bit ARM microarchitecture designed by Broadcom and later Cavium for the server market.

Introduced in 2018, Vulcan-based microprocessors are branded as part of the ThunderX2 family.

History

Vulcan can trace its roots all the way back to Raza Microelectronics XLR family of MIPS processors from 2006. With the introduction of their XLR family in 2009, Raza (and later NetLogic) moved to a high-performance superscalar design with fine-grained 4-way multithreading support. In 2011, Broadcom acquired NetLogic Microsystems and integrated them Broadcom's Embedded Processor Group.

In 2013, Broadcom announced that they have licensed the ARMv7 and ARMv8 architectures, allowing them to develop their own microarchitectures based on the ISA. Vulcan is the outcome of this effort which involved adopting the ARM ISA instead of MIPS and enhancing the cores in various ways.