Semiconductor & Computer Engineering
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Introduced in [[2018]], Vulcan-based microprocessors are branded as part of the {{cavium|ThunderX2}} family. | Introduced in [[2018]], Vulcan-based microprocessors are branded as part of the {{cavium|ThunderX2}} family. | ||
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| + | == History == | ||
| + | Vulcan can trace its roots all the way back to [[Raza Microelectronics]] {{raza|XLR}} family of [[MIPS]] processors from [[2006]]. With the introduction of their {{raza|XLR}} family in [[2009]], Raza (and later [[NetLogic]]) moved to a high-performance superscalar design with fine-grained 4-way multithreading support. In [[2011]], [[Broadcom]] acquired [[NetLogic Microsystems]] and integrated them Broadcom's Embedded Processor Group. | ||
| + | |||
| + | In [[2013]], Broadcom announced that they have licensed the ARMv7 and ARMv8 architectures, allowing them to develop their own microarchitectures based on the ISA. Vulcan is the outcome of this effort which involved adopting the [[ARM]] ISA instead of [[MIPS]] and enhancing the cores in various ways. | ||
== Architecture == | == Architecture == | ||
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== Core == | == Core == | ||
{{empty section}} | {{empty section}} | ||
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== Die == | == Die == | ||
* Broadcom's original die size was around 600 mm². It's unknown how much the die has changed when it was modified by Cavium. | * Broadcom's original die size was around 600 mm². It's unknown how much the die has changed when it was modified by Cavium. | ||
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:[[File:cavium vulcan die (annotated).png|600px]] | :[[File:cavium vulcan die (annotated).png|600px]] | ||
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== All Vulcan Chips == | == All Vulcan Chips == | ||
{{empty section}} | {{empty section}} | ||
Revision as of 11:53, 28 May 2018
| Edit Values | |
| Vulcan µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Broadcomm, Cavium |
| Manufacturer | TSMC |
| Introduction | 2018 |
| Process | 16 nm |
| Core Configs | 16, 20, 24, 28, 30, 32 |
| Pipeline | |
| Type | Superscalar, Superpipeline |
| OoOE | Yes |
| Speculative | Yes |
| Reg Renaming | Yes |
| Stages | 13-15 |
| Decode | 4-way |
| Instructions | |
| ISA | ARMv8.1 |
| Extensions | NEON |
| Cache | |
| L1I Cache | 32 KiB/core 8-way set associative |
| L1D Cache | 32 KiB/core 8-way set associative |
| L2 Cache | 256 KiB/core 8-way set associative |
| L3 Cache | 1 MiB/core |
Vulcan is a 16 nm high-performance 64-bit ARM microarchitecture designed by Broadcom and later Cavium for the server market.
Introduced in 2018, Vulcan-based microprocessors are branded as part of the ThunderX2 family.
Contents
History
Vulcan can trace its roots all the way back to Raza Microelectronics XLR family of MIPS processors from 2006. With the introduction of their XLR family in 2009, Raza (and later NetLogic) moved to a high-performance superscalar design with fine-grained 4-way multithreading support. In 2011, Broadcom acquired NetLogic Microsystems and integrated them Broadcom's Embedded Processor Group.
In 2013, Broadcom announced that they have licensed the ARMv7 and ARMv8 architectures, allowing them to develop their own microarchitectures based on the ISA. Vulcan is the outcome of this effort which involved adopting the ARM ISA instead of MIPS and enhancing the cores in various ways.
Architecture
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Block Diagram
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Memory Hierarchy
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Overview
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Core
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This section is empty; you can help add the missing info by editing this page. |
All Vulcan Chips
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This section is empty; you can help add the missing info by editing this page. |
References
- Some information was obtained directly from Broadcom
- Some information was obtained directly from Cavium
See also
| codename | Vulcan + |
| core count | 16 +, 20 +, 24 +, 28 +, 30 + and 32 + |
| designer | Broadcomm + and Cavium + |
| first launched | 2018 + |
| full page name | cavium/microarchitectures/vulcan + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv8.1 + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Vulcan + |
| pipeline stages (max) | 15 + |
| pipeline stages (min) | 13 + |
| process | 16 nm (0.016 μm, 1.6e-5 mm) + |