From WikiChip
Difference between revisions of "movidius/myriad/ma1133"
< movidius‎ | myriad

(Overview)
Line 30: Line 30:
  
 
== Overview ==
 
== Overview ==
The MA1133 is a vision [[accelerator]] designed to work alongside a main host processors, typically in a mobile or embedded device. The MA1133 consists of a single [[SPARC]] {{sparc|V8}} [[LEON3]] core which is used for management and control and eight {{movidius|SHAVE v2.0|l=arch}} core which are the workhorse of this chip. Each core has 128 KiB of cache. The eight SHAVE cores together are capable of 20GFLOPS of processing power at just a few 100s milliwatt of power.
+
The MA1133 is a vision [[accelerator]] designed to work alongside a main host processors, typically in a mobile or embedded device. The chip communicates directly with the camera and display components.
 +
 
 +
[[File:movidius ma1133 block.png|600px]]
 +
 
 +
The MA1133 consists of a single [[SPARC]] {{sparc|V8}} [[LEON3]] core which is used for management and control and eight {{movidius|SHAVE v2.0|l=arch}} core which are the workhorse of this chip. Each core has 128 KiB of cache. The eight SHAVE cores together are capable of 20GFLOPS of processing power at just a few 100s milliwatt of power.
  
 
[[File:movidius ma1000 silicon platform.png|600px]]
 
[[File:movidius ma1000 silicon platform.png|600px]]

Revision as of 13:10, 11 March 2018

Edit Values
Myriad 1 MA1133
General Info
DesignerMovidius
ManufacturerTSMC
Model NumberMA1133
MarketEmbedded, Mobile
IntroductionSeptember, 2010 (announced)
February, 2011 (launched)
General Specs
FamilyMyriad
Series1
Frequency180 MHz
Microarchitecture
ISASPARC V8 (SPARC), SHAVE (SHAVE)
MicroarchitectureLEON3, SHAVE v2.0
Process65 nm
TechnologyTSMC
Word Size32 bit
Cores9
Threads9
Electrical
Vcore1.2 V
VI/O2.5 V

Myriad 1 MA1133 was a vision processing accelerator designed by Movidius and introduced in 2010 designed to serve as a video streams accelerator for auto-stereoscopic screens for smartphones.

Overview

The MA1133 is a vision accelerator designed to work alongside a main host processors, typically in a mobile or embedded device. The chip communicates directly with the camera and display components.

movidius ma1133 block.png

The MA1133 consists of a single SPARC V8 LEON3 core which is used for management and control and eight SHAVE v2.0 core which are the workhorse of this chip. Each core has 128 KiB of cache. The eight SHAVE cores together are capable of 20GFLOPS of processing power at just a few 100s milliwatt of power.

movidius ma1000 silicon platform.png

base frequency180 MHz (0.18 GHz, 180,000 kHz) +
core count9 +
core voltage1.2 V (12 dV, 120 cV, 1,200 mV) +
designerMovidius +
familyMyriad +
first announcedSeptember 2010 +
first launchedFebruary 2011 +
full page namemovidius/myriad/ma1133 +
instance ofmicroprocessor +
io voltage2.5 V (25 dV, 250 cV, 2,500 mV) +
isaSPARC V8 + and SHAVE +
isa familySPARC + and SHAVE +
ldateFebruary 2011 +
manufacturerTSMC +
market segmentEmbedded + and Mobile +
microarchitectureLEON3 + and SHAVE v2.0 +
model numberMA1133 +
nameMyriad 1 MA1133 +
process65 nm (0.065 μm, 6.5e-5 mm) +
series1 +
thread count9 +
word size32 bit (4 octets, 8 nibbles) +