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Difference between revisions of "zhaoxin/microarchitectures/wudaokou"
< zhaoxin
(wudaokou) |
(No difference)
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Revision as of 02:12, 14 January 2018
Edit Values | |
WuDaoKou µarch | |
General Info | |
Arch Type | CPU |
Designer | Zhaoxin |
Manufacturer | HLMC |
Introduction | December 28, 2017 |
Process | 28 nm |
Core Configs | 2, 4, 8 |
Pipeline | |
Type | Superscalar |
OoOE | Yes |
Speculative | Yes |
Reg Renaming | Yes |
Instructions | |
ISA | x86-64 |
Succession | |
WuDaoKou is the successor to Zhangjiang, a 28 nm x86 microarchitecture designed by Zhaoxin for mainstream laptops, desktops, and servers.
Retrieved from "https://en.wikichip.org/w/index.php?title=zhaoxin/microarchitectures/wudaokou&oldid=72425"
Facts about "WuDaoKou - Microarchitectures - Zhaoxin"
codename | WuDaoKou + |
core count | 2 +, 4 + and 8 + |
designer | Zhaoxin + |
first launched | December 28, 2017 + |
full page name | zhaoxin/microarchitectures/wudaokou + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | HLMC + |
microarchitecture type | CPU + |
name | WuDaoKou + |
process | 28 nm (0.028 μm, 2.8e-5 mm) + |