Difference between revisions of "hisilicon/kirin/980"

	Edit Values
	Kirin 980
	General Info
Designer	HiSilicon,; ARM Holdings
Manufacturer	TSMC
Model Number	980
Market	Mobile
Introduction	August 31, 2018 (announced); August 31, 2018 (launched)
	General Specs
Family	Kirin
Frequency	2,600 MHz, 1,920 MHz, 1,800 MHz
	Microarchitecture
ISA	ARMv8 (ARM)
Microarchitecture	Cortex-A76, Cortex-A55
Core Name	Cortex-A76, Cortex-A55
Process	7 nm
Transistors	6,900,000,000
Technology	CMOS
Die	74.13mm²
Word Size	64 bit
Cores	8
Threads	8

Revision as of 18:04, 14 December 2024

Kirin 980 is a 64-bit high-performance mobile ARM LTE SoC designed by HiSilicon and introduced in late 2018.

Fabricated on TSMC's 7 nm process, the 980 incorporates four big Cortex-A76 cores operating

at up to 2.6 GHz along with four little Cortex-A55 cores operating at up to 1.8 GHz.

This SoC has an LTE modem supporting 1.4 Gbps download (Cat21), incorporates an ARM Mali-G76,

and supports LPDDR4X-4266 memory.

Overview

Introduced at the 2018 IFA, the overall core organization has changed from the Kirin 970 which was introduced the previous year. The 980 features two high-performance big Cortex-A76 core operating at 2.6 GHz, 2 medium-performance big Cortex-A76 operating at 1.92 GHz, and four little Cortex-A55 cores operating at 1.8 GHz. Compared to the 970, the 980 features 40% power efficiency and 62.5% smaller die area due to the process shrink. The 980 ballooned to over 25% more transistors from 5.5 billion in the 970 to 6.9 billion. The 980 adds many enhancements, including a more powerful Mali G76 GPU and incorporates a new dual-neural processor designed for AI acceleration. The 980 has two improved ISPs and a more powerful LTE modem supporting up to User Equipment (UE) category 21 capable of reaching a maximum downlink of 1.4 Gbps.

Cache

Main articles: Cortex-A55 § Cache and Cortex-A76 § Cache

For the Cortex-A76:

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

512 KiB

524,288 B
0.5 MiB

L1I$	256 KiB 262,144 B 0.25 MiB	4x64 KiB
L1D$	256 KiB 262,144 B 0.25 MiB	4x64 KiB

L2$

2 MiB

2,048 KiB
2,097,152 B
0.00195 GiB

		4x512 KiB

For the Cortex-A55:

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

256 KiB

262,144 B
0.25 MiB

L1I$	128 KiB 131,072 B 0.125 MiB	4x32 KiB
L1D$	128 KiB 131,072 B 0.125 MiB	4x32 KiB

L2$

512 KiB

0.5 MiB
524,288 B
4.882812e-4 GiB

		4x128 KiB

Memory controller

The Kirin 980 supports 4-channel LPDDR4X up to 2133 MHz. Each channel supports at most two ranks.

[Edit/Modify Memory Info]

Integrated Memory Controller

Max Type	LPDDR4X-4266
Supports ECC	No
Max Mem	8 GiB
Controllers	1
Channels	4
Width	16 bit
Max Bandwidth	31.78 GiB/s 32,542.72 MiB/s 34.124 GB/s 34,123.515 MB/s 0.031 TiB/s 0.0341 TB/s
Bandwidth	Double 15.89 GiB/s Quad 31.78 GiB/s

Graphics

[Edit/Modify IGP Info]

Integrated Graphics Information

GPU

Mali-G76

Designer

ARM Holdings

Execution Units

10

Max Displays

2

Frequency

720 MHz

0.72 GHz
720,000 KHz

Output

DSI

Standards

DirectX	12
OpenCL	1.2
OpenGL ES	3.2
OpenVG	1.1
Vulkan	1.0

Wireless

LTE Modem
- DL: Up to User Equipment (UE) category 21
  - Downlink of up to 1.4 Gbps (4x4 MIMO + 256QAM 3CC CA = 1.2 Gbps, 2x2 MIMO + 256QAM + 1CC = 200 Mbps)
- UL: Up to User Equipment (UE) category 18
  - Uplink of up to 200 Mbps (2x2 MIMO, 256-QAM, 1x20MHz CA)
Wi-Fi: 802.11 ac, Bluetooth 5, NFC
GPS / A-GPS / GLONASS / BDS

Utilizing devices

Huawei

Huawei P30
Huawei P30 Pro
Huawei Mate 20
Huawei Mate 20 Pro
Huawei Mate 20 X
Huawei Mate 20 X 5G
Huawei Mate 20 RS Porsche Design
Huawei Nova 5T
Honor Magic 2
Honor View 20 / V20
Huawei Mate X
Huawei Honor 20
Huawei Honor 20 Pro
Huawei Mediapad M6 8.4
Huawei Mediapad M6 10.8
Huawei Nova 5 Pro

Bibliography

Huawei Kirin 980 Keynote, 2018 IFA

@@ Line 29: / Line 29: @@
 |thread count=8
 }}
-'''Kirin 980''' is a {{arch|64}} high-performance mobile [[ARM]] [[LTE]] SoC designed by [[HiSilicon]] and introduced in late 2018. Fabricated on TSMC's [[7 nm process]], the 980 incorporates four [[big cores|big]] {{armh|Cortex-A76|l=arch}} cores operating at up to 2.6 GHz along with four [[little cores|little]] {{armh|Cortex-A55|l=arch}} cores operating at up to 1.8 GHz. This SoC has an LTE modem supporting 1.4 Gbps download (Cat21), incorporates an ARM {{armh|Mali-G76}}, and supports LPDDR4X-4266 memory.
+'''Kirin 980''' is a {{arch|64}} high-performance mobile [[ARM]] [[LTE]] SoC designed by [[HiSilicon]] and introduced in late 2018.
+*Fabricated on TSMC's [[7 nm process]], the 980 incorporates four [[big cores|big]] {{armh|Cortex-A76|l=arch}} cores operating
+:at up to 2.6 GHz along with four [[little cores|little]] {{armh|Cortex-A55|l=arch}} cores operating at up to 1.8 GHz.
+*This SoC has an LTE modem supporting 1.4 Gbps download (Cat21), incorporates an [[ARM]] {{armh|Mali-G76}},
+:and supports LPDDR4X-4266 memory.
 == Overview ==
-Introduced at the 2018 IFA, the overall core organization has changed from the {{\\|970|Kirin 970}} which was introduced the previous year. The 980 features two high-performance [[big cores|big]] {{armh|Cortex-A76|l=arch}} core operating at 2.6 GHz, 2 medium-performance [[big cores|big]] {{armh|Cortex-A76|l=arch}} operating at 1.92 GHz, and four [[little cores|little]] {{armh|Cortex-A55|l=arch}} cores operating at 1.8 GHz. Compared to the {{\\|970|970}}, the 980 features 40% power efficiency and 62.5% smaller [[die area]] due to the [[process shrink]]. The 980 ballooned to over 25% more transistors from 5.5 billion in the {{\\|970}} to 6.9 billion. The 980 adds many enhancements, including a more powerful {{armh|Mali G76}} GPU and incorporates a new dual-[[neural processor]] designed for [[AI]] acceleration. The 980 has two improved [[image signal processor|ISP]]s and a more powerful LTE modem supporting up to [[User Equipment]] (UE) category 21 capable of reaching a maximum downlink of 1.4 Gbps.
+Introduced at the [[2018]] IFA, the overall core organization has changed from the {{\\|970|Kirin 970}} which was introduced the previous year. The 980 features two high-performance [[big cores|big]] {{armh|Cortex-A76|l=arch}} core operating at 2.6 GHz, 2 medium-performance [[big cores|big]] {{armh|Cortex-A76|l=arch}} operating at 1.92 GHz, and four [[little cores|little]] {{armh|Cortex-A55|l=arch}} cores operating at 1.8 GHz. Compared to the {{\\|970|970}}, the 980 features 40% power efficiency and 62.5% smaller die area due to the [[process shrink]]. The 980 ballooned to over 25% more transistors from 5.5 billion in the {{\\|970}} to 6.9 billion. The 980 adds many enhancements, including a more powerful {{armh|Mali G76}} GPU and incorporates a new dual-[[neural processor]] designed for ''AI'' acceleration. The 980 has two improved ISPs and a more powerful LTE modem supporting up to ''User Equipment'' (UE) category 21 capable of reaching a maximum downlink of 1.4 Gbps.
 == Cache ==
@@ Line 38: / Line 42: @@
 For the {{armh|Cortex-A76|l=arch}}:
 {{cache size
 |l1 cache=512 KiB
-|l1 break=1
-|l1 desc=1
-|l1 policy=https://en.wikichip.org/
 |l1i cache=256 KiB
 |l1i break=4x64 KiB
-|l1i desc=1
-|l1i policy=1
 |l1d cache=256 KiB
 |l1d break=4x64 KiB
-|l1d desc=1
-|l1d policy=1
 |l2 cache=2 MiB
 |l2 break=4x512 KiB
-|l2 desc=1
-|l2 policy=1
-|l2i cache=1
-|l2i break=1
-|l2i desc=1
-|l2i policy=1
-|l2d cache=1
-|l2d break=1
-|l2d desc=1
-|l2d policy=1
-|l3 cache=1
-|l3 break=1
-|l3 desc=1
-|l3 policy=1
-|l4 cache=1
-|l4 break=1
-|l4 desc=1
-|l4 policy=1
 }}
 For the {{armh|Cortex-A55|l=arch}}:
 {{cache size
 |l1 cache=256 KiB
@@ Line 85: / Line 62: @@
 |l2 break=4x128 KiB
 }}
 == Memory controller ==
 The Kirin 980 supports 4-channel LPDDR4X up to 2133 MHz. Each channel supports at most two ranks.
 {{memory controller
 |type=LPDDR4X-4266
@@ Line 130: / Line 105: @@
 == Wireless ==
 * LTE Modem
-** DL: Up to [[User Equipment]] (UE) category 21
+** DL: Up to ''User Equipment'' (UE) category 21
 *** Downlink of up to 1.4 Gbps (4x4 MIMO + 256QAM 3CC CA = 1.2 Gbps, 2x2 MIMO + 256QAM + 1CC = 200 Mbps)
-** UL: Up to [[User Equipment]] (UE) category 18
+** UL: Up to ''User Equipment'' (UE) category 18
 *** Uplink of up to 200 Mbps (2x2 MIMO, 256-QAM, 1x20MHz CA)
-* Wi-Fi 802.11 ac
+* Wi-Fi: 802.11 ac,  Bluetooth 5, NFC
-* Bluetooth 5
-* NFC
 * GPS / A-GPS / GLONASS / BDS
 == Utilizing devices ==
+:;[[Huawei]]
 * [[used by::Huawei P30]]
 * [[used by::Huawei P30 Pro]]

base frequency	2,600 MHz (2.6 GHz, 2,600,000 kHz) +, 1,920 MHz (1.92 GHz, 1,920,000 kHz) + and 1,800 MHz (1.8 GHz, 1,800,000 kHz) +
core count	8 +
core name	Cortex-A76 + and Cortex-A55 +
designer	HiSilicon + and ARM Holdings +
die area	74.13 mm² (0.115 in², 0.741 cm², 74,130,000 µm²) +
family	Kirin +
first announced	August 31, 2018 +
first launched	August 31, 2018 +
full page name	hisilicon/kirin/980 +
has ecc memory support	false +
instance of	microprocessor +
integrated gpu	Mali-G76 +
integrated gpu base frequency	720 MHz (0.72 GHz, 720,000 KHz) +
integrated gpu designer	ARM Holdings +
integrated gpu execution units	10 +
isa	ARMv8 +
isa family	ARM +
l1$ size	512 KiB (524,288 B, 0.5 MiB) + and 256 KiB (262,144 B, 0.25 MiB) +
l1d$ size	256 KiB (262,144 B, 0.25 MiB) + and 128 KiB (131,072 B, 0.125 MiB) +
l1i$ size	256 KiB (262,144 B, 0.25 MiB) + and 128 KiB (131,072 B, 0.125 MiB) +
l2$ size	2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + and 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
ldate	3000 +
manufacturer	TSMC +
market segment	Mobile +
max memory bandwidth	31.78 GiB/s (32,542.72 MiB/s, 34.124 GB/s, 34,123.515 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels	4 +
microarchitecture	Cortex-A76 + and Cortex-A55 +
model number	980 +
name	Kirin 980 +
process	7 nm (0.007 μm, 7.0e-6 mm) +
supported memory type	LPDDR4X-4266 +
technology	CMOS +
thread count	8 +
transistor count	6,900,000,000 +
used by	Huawei P30 +, Huawei P30 Pro +, Huawei Mate 20 +, Huawei Mate 20 Pro +, Huawei Mate 20 X +, Huawei Mate 20 X 5G +, Huawei Mate 20 RS Porsche Design +, Huawei Nova 5T +, Honor Magic 2 +, Honor View 20 / V20 +, Huawei Mate X +, Huawei Honor 20 +, Huawei Honor 20 Pro +, Huawei Mediapad M6 8.4 +, Huawei Mediapad M6 10.8 + and Huawei Nova 5 Pro +
word size	64 bit (8 octets, 16 nibbles) +

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