Revision as of 20:25, 10 October 2020

Zen 3 is a planned microarchitecture being developed by AMD as a successor to Zen 2.

History

Zen 3 was formally disclosed in a roadmap by Lisa Su, AMD's CEO, during AMD's Tech Day in February of 2017. Zen 3 will be the 3rd iteration of the Zen microarchitecture. On Investor's Day in May 2017 Jim Anderson, AMD Senior Vice President, confirmed that Zen 3 is set to utilize 7nm+ process.

Codenames

Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.

Process technology

Zen 3 will be fabricated on TSMC's 7nm+ process.

Architecture

There is very limited information available about the architectural improvements of Zen 3.

Key changes from Zen 2

• Unified 8-core CCX with 32 MiB L3$ available to all 8 cores equally

• Wider and more flexible issue in floating-point and integer engines

• Increased number of loads and stores, improved prefetching

• Increased branch prediction bandwidth, "zero-bubble" branch prediction

• Improved µop cache

• [Unconfirmed] 7 nm+ process (from 7 nm), 20% more density and 10% power reduction compared to Zen 2. EUV (Extreme Ultraviolet) lithography 7nm+.

This list is incomplete; you can help by expanding it.

Designers

• Leslie Barnes, chief architect

Bibliography

• AMD 'Tech Day', February 22, 2017
• AMD 2017 Financial Analyst Day, May 16, 2017

All Zen3 Chips

Ryzen brand logo

See Also

• AMD Zen
• Intel Tigerlake