From WikiChip
Difference between revisions of "amd/ryzen 5/3600"
(Created page with "{{amd title|Ryzen 5 3600}} {{chip |future=Yes |name=Ryzen 5 3600 |no image=Yes |designer=AMD |manufacturer=TSMC |model number=3600 |market=Desktop |first announced=May 27, 201...") |
|||
| Line 30: | Line 30: | ||
}} | }} | ||
'''Ryzen 5 3600''' is a {{arch|64}} [[hexa-core]] high-end performance [[x86]] desktop microprocessor introduced by [[AMD]] in mid-[[2019]]. Fabricated on TSMC's [[7 nm process]] based on the {{amd|Zen 2|Zen 2 microarchitecture|l=arch}}, this processor operates at 3.6 GHz with a [[TDP]] of 65 W and a {{amd|Precision Boost|Boost}} frequency of up to 4.2 GHz. | '''Ryzen 5 3600''' is a {{arch|64}} [[hexa-core]] high-end performance [[x86]] desktop microprocessor introduced by [[AMD]] in mid-[[2019]]. Fabricated on TSMC's [[7 nm process]] based on the {{amd|Zen 2|Zen 2 microarchitecture|l=arch}}, this processor operates at 3.6 GHz with a [[TDP]] of 65 W and a {{amd|Precision Boost|Boost}} frequency of up to 4.2 GHz. | ||
| + | |||
| + | == Cache == | ||
| + | {{main|amd/microarchitectures/zen 2#Memory_Hierarchy|l1=Zen 2 § Cache}} | ||
| + | {{cache size | ||
| + | |l1 cache=576 KiB | ||
| + | |l1i cache=384 KiB | ||
| + | |l1i break=6x64 KiB | ||
| + | |l1i desc=4-way set associative | ||
| + | |l1d cache=192 KiB | ||
| + | |l1d break=6x32 KiB | ||
| + | |l1d desc=8-way set associative | ||
| + | |l1d policy=write-back | ||
| + | |l2 cache=3 MiB | ||
| + | |l2 break=6x512 KiB | ||
| + | |l2 desc=8-way set associative | ||
| + | |l2 policy=write-back | ||
| + | |l3 cache=32 MiB | ||
| + | |l3 break=2x16 MiB | ||
| + | }} | ||
Revision as of 12:54, 27 May 2019
| Edit Values | |
| Ryzen 5 3600 | |
| General Info | |
| Designer | AMD |
| Manufacturer | TSMC |
| Model Number | 3600 |
| Market | Desktop |
| Introduction | May 27, 2019 (announced) July 7, 2019 (launched) |
| Release Price | $199 |
| Shop | Amazon |
| General Specs | |
| Family | Ryzen 5 |
| Series | 3000 |
| Locked | No |
| Frequency | 3,600 MHz |
| Turbo Frequency | 4,200 MHz |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Zen 2 |
| Core Name | Matisse |
| Process | 7 nm |
| Technology | CMOS |
| Word Size | 64 bit |
| Cores | 6 |
| Threads | 12 |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| TDP | 65 W |
| Packaging | |
| Template:packages/amd/socket am4 | |
Ryzen 5 3600 is a 64-bit hexa-core high-end performance x86 desktop microprocessor introduced by AMD in mid-2019. Fabricated on TSMC's 7 nm process based on the Zen 2 microarchitecture, this processor operates at 3.6 GHz with a TDP of 65 W and a Boost frequency of up to 4.2 GHz.
Cache
- Main article: Zen 2 § Cache
|
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
|||||||||||||||||||||||||||||||||||||
|
|||||||||||||||||||||||||||||||||||||
Facts about "Ryzen 5 3600 - AMD"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Ryzen 5 3600 - AMD#pcie + |
| back image | |
| base frequency | 3,600 MHz (3.6 GHz, 3,600,000 kHz) + |
| core count | 6 + |
| core name | Matisse + |
| core stepping | B0 + |
| designer | AMD + |
| die count | 2 + |
| family | Ryzen 5 + |
| first announced | May 27, 2019 + |
| first launched | July 7, 2019 + |
| full page name | amd/ryzen 5/3600 + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has amd amd-v technology | true + |
| has amd amd-vi technology | true + |
| has amd extended frequency range 2 | true + |
| has amd precision boost 2 | true + |
| has amd sensemi technology | true + |
| has ecc memory support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, SenseMI Technology +, Extended Frequency Range 2 + and Precision Boost 2 + |
| has locked clock multiplier | false + |
| has simultaneous multithreading | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| instance of | microprocessor + |
| is multi-chip package | true + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 384 KiB (393,216 B, 0.375 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 192 KiB (196,608 B, 0.188 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 192 KiB (196,608 B, 0.188 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
| l3$ size | 32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) + |
| ldate | July 7, 2019 + |
| main image | |
| manufacturer | TSMC + |
| market segment | Desktop + |
| max cpu count | 1 + |
| max memory | 131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) + |
| max memory bandwidth | 47.68 GiB/s (48,824.32 MiB/s, 51.196 GB/s, 51,196.01 MB/s, 0.0466 TiB/s, 0.0512 TB/s) + |
| max memory channels | 4 + |
| microarchitecture | Zen 2 + |
| model number | 3600 + |
| name | Ryzen 5 3600 + |
| package | OPGA-1331 + |
| part number | 100-000000031 + and 100-100000031BOX + |
| process | 7 nm (0.007 μm, 7.0e-6 mm) + and 12 nm (0.012 μm, 1.2e-5 mm) + |
| release price | $ 199.00 (€ 179.10, £ 161.19, ¥ 20,562.67) + |
| series | 3000 + |
| smp max ways | 1 + |
| socket | Socket AM4 + |
| supported memory type | DDR4-3200 + |
| tdp | 65 W (65,000 mW, 0.0872 hp, 0.065 kW) + |
| technology | CMOS + |
| thread count | 12 + |
| turbo frequency | 4,200 MHz (4.2 GHz, 4,200,000 kHz) + |
| word size | 64 bit (8 octets, 16 nibbles) + |