Difference between revisions of "intel/xeon platinum/8256"

	Edit Values
	Xeon Platinum 8256
	General Info
Designer	Intel
Manufacturer	Intel
Model Number	8256
Part Number	CD8069504194701
S-Spec	SRF94
Market	Server
Introduction	April 2, 2019 (announced); April 2, 2019 (launched)
Release Price	$7007.00 (tray); $7014.00 (box)
Shop	Amazon
	General Specs
Family	Xeon Platinum
Series	8200
Locked	Yes
Frequency	3,800 MHz
Turbo Frequency	3,900 MHz (1 core)
Clock multiplier	38
CPUID	0x50655
	Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Cascade Lake
Platform	Purley
Chipset	Lewisburg
Core Name	Cascade Lake SP
Core Family	6
Core Stepping	B1
Process	14 nm
Technology	CMOS
Word Size	64 bit
Cores	4
Threads	8
Max Memory	1 TiB
	Multiprocessing
Max SMP	8-Way (Multiprocessor)
	Electrical
TDP	105 W
	Packaging
Package	FCLGA-3647 (FCLGA)
Dimension	76.16 mm × 56.6 mm
Pitch	0.8585 mm × 0.9906 mm
Contacts	3647
Socket	Socket P, LGA-3647

Revision as of 02:08, 6 April 2019

Xeon Platinum 8256 is a 64-bit quad-core x86 high-performance server microprocessor introduced by Intel in early 2019. The Platinum 8256 is based on the Cascade Lake microarchitecture and is manufactured on a 14 nm process. This chip supports 8-way multiprocessing, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2933 memory, operates at 3.8 GHz with a TDP of 105 W and features a turbo boost frequency of up to 3.9 GHz.

Cache

Main article: Cascade Lake § Cache

The Xeon Platinum 8256 features a considerably larger non-default 16.5 MiB of L3, a size that would normally be found on a 12-core part.

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

256 KiB

262,144 B
0.25 MiB

L1I$	128 KiB 131,072 B 0.125 MiB	4x32 KiB	8-way set associative
L1D$	128 KiB 131,072 B 0.125 MiB	4x32 KiB	8-way set associative	write-back

L2$

4 MiB

4,096 KiB
4,194,304 B
0.00391 GiB

		4x1 MiB	16-way set associative	write-back

L3$

16.5 MiB

16,896 KiB
17,301,504 B
0.0161 GiB

		12x1.375 MiB	11-way set associative	write-back

@@ Line 38: / Line 38: @@
 |package name 1=intel,fclga_3647
 }}
-'''Xeon Platinum 8256''' is a {{arch|64}} [[4-core]] [[x86]] high-performance server microprocessor introduced by [[Intel]] in early [[2019]]. The Platinum 8256 is based on the {{intel|Cascade Lake|l=arch}} microarchitecture and is manufactured on a [[14 nm process]]. This chip supports 8-way multiprocessing, sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2933 memory, operates at 3.8 GHz with a TDP of 105 W and features a {{intel|turbo boost}} frequency of up to 3.9 GHz.
+'''Xeon Platinum 8256''' is a {{arch|64}} [[quad-core]] [[x86]] high-performance server microprocessor introduced by [[Intel]] in early [[2019]]. The Platinum 8256 is based on the {{intel|Cascade Lake|l=arch}} microarchitecture and is manufactured on a [[14 nm process]]. This chip supports 8-way multiprocessing, sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2933 memory, operates at 3.8 GHz with a TDP of 105 W and features a {{intel|turbo boost}} frequency of up to 3.9 GHz.
+== Cache ==
+{{main|intel/microarchitectures/cascade_lake#Memory_Hierarchy|l1=Cascade Lake § Cache}}
+The Xeon Platinum 8256 features a considerably larger non-default 16.5 MiB of [[L3]], a size that would normally be found on a 12-core part.
+{{cache size
+|l1 cache=256 KiB
+|l1i cache=128 KiB
+|l1i break=4x32 KiB
+|l1i desc=8-way set associative
+|l1d cache=128 KiB
+|l1d break=4x32 KiB
+|l1d desc=8-way set associative
+|l1d policy=write-back
+|l2 cache=4 MiB
+|l2 break=4x1 MiB
+|l2 desc=16-way set associative
+|l2 policy=write-back
+|l3 cache=16.5 MiB
+|l3 break=12x1.375 MiB
+|l3 desc=11-way set associative
+|l3 policy=write-back
+}}

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Xeon Platinum 8256 - Intel#pcie +
base frequency	3,800 MHz (3.8 GHz, 3,800,000 kHz) +
chipset	Lewisburg +
clock multiplier	38 +
core count	4 +
core family	6 +
core name	Cascade Lake SP +
core stepping	B0 + and B1 +
cpuid	0x50655 +
designer	Intel +
family	Xeon Platinum +
first announced	April 2, 2019 +
first launched	April 2, 2019 +
full page name	intel/xeon platinum/8256 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has advanced vector extensions 512	true +
has ecc memory support	true +
has extended page tables support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions + and Deep Learning Boost +
has intel deep learning boost	true +
has intel enhanced speedstep technology	true +
has intel speed shift technology	true +
has intel trusted execution technology	true +
has intel turbo boost technology 2 0	true +
has intel vpro technology	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	256 KiB (262,144 B, 0.25 MiB) +
l1d$ description	8-way set associative +
l1d$ size	128 KiB (131,072 B, 0.125 MiB) +
l1i$ description	8-way set associative +
l1i$ size	128 KiB (131,072 B, 0.125 MiB) +
l2$ description	16-way set associative +
l2$ size	4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ description	11-way set associative +
l3$ size	16.5 MiB (16,896 KiB, 17,301,504 B, 0.0161 GiB) +
ldate	April 2, 2019 +
main image	+
manufacturer	Intel +
market segment	Server +
max cpu count	8 +
max memory	1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) +
max memory bandwidth	131.13 GiB/s (134,277.12 MiB/s, 140.8 GB/s, 140,799.765 MB/s, 0.128 TiB/s, 0.141 TB/s) +
max memory channels	6 +
microarchitecture	Cascade Lake +
model number	8256 +
name	Xeon Platinum 8256 +
number of avx-512 execution units	2 +
package	FCLGA-3647 +
part number	CD8069504194701 + and BX806958256 +
platform	Purley +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 7,007.00 (€ 6,306.30, £ 5,675.67, ¥ 724,033.31) + and $ 7,014.00 (€ 6,312.60, £ 5,681.34, ¥ 724,756.62) +
release price (box)	$ 7,014.00 (€ 6,312.60, £ 5,681.34, ¥ 724,756.62) +
release price (tray)	$ 7,007.00 (€ 6,306.30, £ 5,675.67, ¥ 724,033.31) +
s-spec	SRF94 +
s-spec (qs)	QRAP +
series	8200 +
smp interconnect	UPI +
smp interconnect links	3 +
smp interconnect rate	10.4 GT/s +
smp max ways	8 +
socket	Socket P + and LGA-3647 +
supported memory type	DDR4-2933 +
tdp	105 W (105,000 mW, 0.141 hp, 0.105 kW) +
technology	CMOS +
thread count	8 +
turbo frequency (1 core)	3,900 MHz (3.9 GHz, 3,900,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +

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Revision as of 02:08, 6 April 2019

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