From WikiChip
Difference between revisions of "amd/athlon/300u"
< amd‎ | athlon

Line 54: Line 54:
 
|l3 break=1x4 MiB
 
|l3 break=1x4 MiB
 
}}
 
}}
 +
 +
== Memory controller ==
 +
{{memory controller
 +
|type=DDR4-2400
 +
|ecc=Yes
 +
|max mem=32 GiB
 +
|controllers=2
 +
|channels=2
 +
|max bandwidth=35.76 GiB/s
 +
|bandwidth schan=17.88 GiB/s
 +
|bandwidth dchan=35.76 GiB/s
 +
}}
 +
 +
== Expansions ==
 +
This processor has 12 PCIe lanes, 1x8 typically designated for a [[GPU]] and 4 additional lanes for storage (e.g., NVMe).
 +
{{expansions main
 +
|
 +
{{expansions entry
 +
|type=PCIe
 +
|pcie revision=3.0
 +
|pcie lanes=12
 +
|pcie config=1x8+1x4
 +
|pcie config 2=2x4+1x4
 +
}}
 +
}}
 +
 +
== Graphics ==
 +
{{integrated graphics
 +
| gpu                = Radeon Vega 3
 +
| device id          =
 +
| designer            = AMD
 +
| execution units    = 3
 +
| unified shaders    = 192
 +
| max displays        =
 +
| max memory          =
 +
| frequency          =
 +
| max frequency      = 1,200 MHz
 +
 +
| output crt          =
 +
| output sdvo        =
 +
| output dsi          =
 +
| output edp          =
 +
| output dp          = Yes
 +
| output hdmi        = Yes
 +
| output vga          =
 +
| output dvi          =
 +
 +
| directx ver        = 12
 +
| opengl ver        = 4.6
 +
| opencl ver        = 2.2
 +
| hdmi ver          =
 +
| dp ver            =
 +
| edp ver            =
 +
| max res hdmi      =
 +
| max res hdmi freq  =
 +
| max res dp        =
 +
| max res dp freq    =
 +
| max res edp        =
 +
| max res edp freq  =
 +
| max res vga        =
 +
| max res vga freq  =
 +
}}
 +
{{zen with vega hardware accelerated video table|col=1}}

Revision as of 15:26, 7 January 2019

Edit Values
Athlon 300U
General Info
DesignerAMD
ManufacturerGlobalFoundries
Model Number300U
Part NumberYM300UC4T2OFG
MarketMobile
IntroductionJanuary 6, 2019 (announced)
January 6, 2019 (launched)
ShopAmazon
General Specs
FamilyAthlon
Series300
Frequency2,400 MHz
Turbo Frequency3,300 MHz (1 core)
Bus typePCIe 3.0
Clock multiplier24
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen+
Core NamePicasso
Process12 nm
Transistors4,940,000,000
TechnologyCMOS
Die209.78 mm²
Word Size64 bit
Cores4
Threads8
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP15 W
OP Temperature0° C – 105 °C
Packaging
Unknown package "amd,socket_fp5"

Athlon 300U is a 64-bit dual-core value x86 mobile microprocessor introduced by AMD in early 2019. This processor is based on AMD's Zen+ microarchitecture and is fabricated on a 12 nm process. The 300U operates at a base frequency of 2.4 GHz with a TDP of 15 W and a Boost frequency of 3.3 GHz. This APU supports up to 32 GiB of dual-channel DDR4-2400 memory and incorporates Radeon Vega 3 Graphics operating at up to 1 GHz.

Cache

Main article: Zen+ § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$192 KiB
196,608 B
0.188 MiB
L1I$128 KiB
131,072 B
0.125 MiB
2x64 KiB4-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  2x512 KiB8-way set associativewrite-back
L3$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  1x4 MiB  

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2400
Supports ECCYes
Max Mem32 GiB
Controllers2
Channels2
Max Bandwidth35.76 GiB/s
36,618.24 MiB/s
38.397 GB/s
38,397.008 MB/s
0.0349 TiB/s
0.0384 TB/s
Bandwidth
Single 17.88 GiB/s
Double 35.76 GiB/s

Expansions

This processor has 12 PCIe lanes, 1x8 typically designated for a GPU and 4 additional lanes for storage (e.g., NVMe).

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 12
Configuration: 1x8+1x4, 2x4+1x4


Graphics

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPURadeon Vega 3
DesignerAMD
Execution Units3
Unified Shaders192
Burst Frequency1,200 MHz
1.2 GHz
1,200,000 KHz
OutputDP, HDMI
Standards
DirectX12
OpenGL4.6
OpenCL2.2
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/athlon/300u&oldid=85690"
Facts about "Athlon 300U - AMD"
RDF feed
base frequency2,400 MHz (2.4 GHz, 2,400,000 kHz) +
bus typePCIe 3.0 +
clock multiplier24 +
core count4 +
core namePicasso +
designerAMD +
die area209.78 mm² (0.325 in², 2.098 cm², 209,780,000 µm²) +
familyAthlon +
first announcedJanuary 6, 2019 +
first launchedJanuary 6, 2019 +
full page nameamd/athlon/300u +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
ldateJanuary 6, 2019 +
manufacturerGlobalFoundries +
market segmentMobile +
max cpu count1 +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max operating temperature105 °C +
microarchitectureZen+ +
min operating temperature0° C +
model number300U +
nameAthlon 300U +
part numberYM300UC4T2OFG +
process12 nm (0.012 μm, 1.2e-5 mm) +
series300 +
smp max ways1 +
tdp15 W (15,000 mW, 0.0201 hp, 0.015 kW) +
technologyCMOS +
thread count8 +
transistor count4,940,000,000 +
turbo frequency (1 core)3,300 MHz (3.3 GHz, 3,300,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +