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Difference between revisions of "amd/packages/socket tr4"
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== Overview == | == Overview == | ||
| − | sTR4 is a socket specifically designed by AMD for their {{amd|Threadripper}} family of HEDT processors and is supported by processors based on the {{amd|Zen|l=arch}} and {{amd|Zen+|l=arch}} microarchitectures. | + | sTR4 is a socket specifically designed by AMD for their {{amd|Threadripper}} family of HEDT processors and is supported by processors based on the {{amd|Zen|l=arch}} and {{amd|Zen+|l=arch}} microarchitectures. Physically, the package is identical to the one used for {{amd|Socket SP3}} for their {{amd|EPYC}} processors, however the features are much reduced. |
| + | |||
| + | === Supported Processors === | ||
| + | * {{#ask: [[Category:microprocessor models by amd]] | ||
| + | [[socket::Socket TR4]] | ||
| + | |?first launched | ||
| + | |?core name | ||
| + | |?core count | ||
| + | |?thread count | ||
| + | |?tdp | ||
| + | |format=broadtable | ||
| + | |link=all | ||
| + | |headers=show | ||
| + | |limit=0 | ||
| + | |searchlabel=Show Socket TR4-Supported Processors | ||
| + | |class=sortable wikitable smwtable | ||
| + | }} | ||
| + | |||
| + | == Bibliography == | ||
| + | * David. S. (March 2018). "[https://fuse.wikichip.org/news/1064/isscc-2018-amds-zeppelin-multi-chip-routing-and-packaging/ ISSCC 2018: AMD’s Zeppelin; Multi-chip routing and packaging]" | ||
| + | * AMD (November 2017). "Thermal Design Guide for Socket SP3 Processors" | ||
Revision as of 13:46, 11 August 2018
| Edit Values | |
| Socket TR4 | |
| General Info | |
| Designer | AMD |
| Introduction | May 16, 2017 (announced) August 10, 2017 (launched) |
| Market | Desktop |
| Microarchitecture | Zen, Zen+ |
| TDP | 180 W 180,000 mW , 250 W0.241 hp 0.18 kW 250,000 mW 0.335 hp 0.25 kW |
| Package | |
| Name | FCLGA-4094 |
| Type | Organic Flip-Chip Land Grid Array |
| Contacts | 4094 |
| Dimension | 58.5 mm 5.85 cm × 75.4 mm2.303 in 7.54 cm 2.969 in |
| Pitch | 1.00 mm 0.0394 in |
| Socket | |
| Name | Socket TR4, sTR4, Socket SP3r2 |
| Type | LGA |
Socket TR4 (sTR4) also Socket SP3r2 is land grid array microprocessor socket designed by AMD for their Threadripper family supported by the Zen and Zen+ microarchitectures. This socket is designed for ICs with a 4094-contact FCLGA packages.
Overview
sTR4 is a socket specifically designed by AMD for their Threadripper family of HEDT processors and is supported by processors based on the Zen and Zen+ microarchitectures. Physically, the package is identical to the one used for Socket SP3 for their EPYC processors, however the features are much reduced.
Supported Processors
Bibliography
- David. S. (March 2018). "ISSCC 2018: AMD’s Zeppelin; Multi-chip routing and packaging"
- AMD (November 2017). "Thermal Design Guide for Socket SP3 Processors"
Facts about "Socket TR4 (SP3r2, sTR4) - Packages - AMD"
| designer | AMD + |
| first announced | May 16, 2017 + |
| first launched | August 10, 2017 + |
| instance of | package + |
| market segment | Desktop + |
| microarchitecture | Zen + and Zen+ + |
| name | Socket TR4 + |
| package | FCLGA-4094 + |
| package contacts | 4,094 + |
| package length | 58.5 mm (5.85 cm, 2.303 in) + |
| package pitch | 1 mm (0.0394 in) + |
| package type | Organic Flip-Chip Land Grid Array + |
| package width | 75.4 mm (7.54 cm, 2.969 in) + |
| socket | Socket TR4 +, sTR4 + and Socket SP3r2 + |
| tdp | 180 W (180,000 mW, 0.241 hp, 0.18 kW) + and 250 W (250,000 mW, 0.335 hp, 0.25 kW) + |