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Difference between revisions of "intel/core i5/i5-8500b"
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{{intel title|Core i5-8500B}}
 
{{intel title|Core i5-8500B}}
 
{{chip
 
{{chip
|future=Yes
 
 
|name=Core i5-8500B
 
|name=Core i5-8500B
|no image=Yes
+
|image=coffee lake h (front).png
 
|designer=Intel
 
|designer=Intel
 
|manufacturer=Intel
 
|manufacturer=Intel
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|series=i5-8000
 
|series=i5-8000
 
|locked=Yes
 
|locked=Yes
 +
|frequency=3,000 MHz
 +
|turbo frequency1=4,100 MHz
 
|bus type=DMI 3.0
 
|bus type=DMI 3.0
 
|bus links=4
 
|bus links=4
 
|bus rate=8 GT/s
 
|bus rate=8 GT/s
 +
|clock multiplier=30
 
|isa=x86-64
 
|isa=x86-64
 
|isa family=x86
 
|isa family=x86

Revision as of 03:07, 4 April 2018

Edit Values
Core i5-8500B
coffee lake h (front).png
General Info
DesignerIntel
ManufacturerIntel
Model Numberi5-8500B
ShopAmazon
General Specs
FamilyCore i5
Seriesi5-8000
LockedYes
Frequency3,000 MHz
Turbo Frequency4,100 MHz (1 core)
Bus typeDMI 3.0
Bus rate4 × 8 GT/s
Clock multiplier30
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureCoffee Lake
Core NameCoffee Lake S
Process14 nm
TechnologyCMOS
Die126 mm²
Word Size64 bit
Cores6
Threads6
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)

Core i5-8500B is a 64-bit hexa-core mid-range performance x86 microprocessor set to be introduced by Intel in 2018. This processor, which is based on the Coffee Lake microarchitecture, is manufactured on Intel's 3rd generation enhanced 14nm++ process.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache

Main article: Coffee Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$386 KiB
395,264 B
0.377 MiB
L1I$192 KiB
196,608 B
0.188 MiB
6x32 KiB8-way set associative 
L1D$192 KiB
196,608 B
0.188 MiB
6x32 KiB8-way set associativewrite-back

L2$1.5 MiB
1,536 KiB
1,572,864 B
0.00146 GiB
  6x256 KiB4-way set associativewrite-back

L3$9 MiB
9,216 KiB
9,437,184 B
0.00879 GiB
  6x1.5 MiB12-way set associativewrite-back
Facts about "Core i5-8500B - Intel"
base frequency3,000 MHz (3 GHz, 3,000,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
clock multiplier30 +
core count6 +
core nameCoffee Lake S +
designerIntel +
die area126 mm² (0.195 in², 1.26 cm², 126,000,000 µm²) +
familyCore i5 +
full page nameintel/core i5/i5-8500b +
has locked clock multipliertrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size386 KiB (395,264 B, 0.377 MiB) +
l1d$ description8-way set associative +
l1d$ size192 KiB (196,608 B, 0.188 MiB) +
l1i$ description8-way set associative +
l1i$ size192 KiB (196,608 B, 0.188 MiB) +
l2$ description4-way set associative +
l2$ size1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) +
l3$ description12-way set associative +
l3$ size9 MiB (9,216 KiB, 9,437,184 B, 0.00879 GiB) +
ldate1900 +
main imageFile:coffee lake h (front).png +
manufacturerIntel +
max cpu count1 +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
microarchitectureCoffee Lake +
model numberi5-8500B +
nameCore i5-8500B +
process14 nm (0.014 μm, 1.4e-5 mm) +
seriesi5-8000 +
smp max ways1 +
technologyCMOS +
thread count6 +
turbo frequency (1 core)4,100 MHz (4.1 GHz, 4,100,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +