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|microarch=Zen 2 | |microarch=Zen 2 | ||
|core name=Renoir | |core name=Renoir | ||
+ | |core family=23 | ||
+ | |core model=96 | ||
+ | |core stepping=A1 | ||
|process=7 nm | |process=7 nm | ||
|transistors=9,800,000,000 | |transistors=9,800,000,000 | ||
Line 31: | Line 34: | ||
|tcase min=0 °C | |tcase min=0 °C | ||
|tcase max=105 °C | |tcase max=105 °C | ||
− | |package name 1=amd, | + | |package name 1=amd,fp6 |
}} | }} | ||
− | '''Ryzen 7 4800HS''' is a {{arch|64}} [[octa-core]] high-end performance [[x86]] mobile microprocessor introduced by [[AMD]] in early [[2020]]. Fabricated on [[N7|TSMC's 7-nanometer process]] based on AMD's {{amd|Zen 2|Zen 2 microarchitecture|l=arch}}, the 4800HS operates at a base frequency of 2.9 GHz with a [[TDP]] of 35 W and a {{amd|Precision Boost| | + | '''Ryzen 7 4800HS''' is a {{arch|64}} [[octa-core]] high-end performance [[x86]] mobile microprocessor introduced by [[AMD]] in early [[2020]]. Fabricated on [[N7|TSMC's 7-nanometer process]] and based on AMD's {{amd|Zen 2|Zen 2 microarchitecture|l=arch}}, the 4800HS operates at a base frequency of 2.9 GHz with a [[TDP]] of 35 W and a {{amd|Precision Boost|boost}} frequency of up to 4.2 GHz. This APU supports up to 64 GiB of DDR4-3200 or up to 32 GiB of quad-channel LPDDR4x-4266 memory. The 4800HS integrates {{amd|Radeon Vega 7}} graphics operating at up to 1.6 GHz. |
This processor is identical to the {{\\|4800H}} except for its lower TDP. | This processor is identical to the {{\\|4800H}} except for its lower TDP. | ||
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|l3 cache=8 MiB | |l3 cache=8 MiB | ||
|l3 break=2x4 MiB | |l3 break=2x4 MiB | ||
+ | |l3 desc=16-way set associative | ||
+ | |l3 policy=write-back | ||
}} | }} | ||
Line 65: | Line 70: | ||
|controllers=2 | |controllers=2 | ||
|channels=4 | |channels=4 | ||
− | |max bandwidth=68.27 | + | |max bandwidth=68.27 GB/s |
− | |bandwidth schan=17. | + | |bandwidth schan=17.07 GB/s |
|bandwidth dchan=34.13 GB/s | |bandwidth dchan=34.13 GB/s | ||
|bandwidth qchan=68.27 GB/s | |bandwidth qchan=68.27 GB/s | ||
Line 122: | Line 127: | ||
}} | }} | ||
{{zen 2 with vega hardware accelerated video table}} | {{zen 2 with vega hardware accelerated video table}} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=Yes | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
+ | |avx512f=No | ||
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx512vnni=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |abm=Yes | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=Yes | ||
+ | |xop=No | ||
+ | |adx=Yes | ||
+ | |clmul=Yes | ||
+ | |f16c=Yes | ||
+ | |bfloat16=No | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=No | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=No | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=No | ||
+ | |vtd=No | ||
+ | |ept=No | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=No | ||
+ | |dlboost=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=Yes | ||
+ | |amdv=Yes | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=Yes | ||
+ | |sensemi=Yes | ||
+ | |xfr=No | ||
+ | |xfr2=No | ||
+ | |mxfr=No | ||
+ | |amdpb=No | ||
+ | |amdpb2=No | ||
+ | |amdpbod=No | ||
+ | }} | ||
+ | |||
+ | == Die == | ||
+ | {{amd renoir die}} |
Latest revision as of 23:43, 25 March 2023
Edit Values | |
Ryzen 7 4800HS | |
General Info | |
Designer | AMD |
Manufacturer | TSMC |
Model Number | 4800HS |
Market | Mobile |
Introduction | March 16, 2020 (announced) March 16, 2020 (launched) |
Shop | Amazon |
General Specs | |
Family | Ryzen 7 |
Series | 4000 |
Locked | Yes |
Frequency | 2,900 MHz |
Turbo Frequency | 4,200 MHz |
Clock multiplier | 29 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Zen 2 |
Core Name | Renoir |
Core Family | 23 |
Core Model | 96 |
Core Stepping | A1 |
Process | 7 nm |
Transistors | 9,800,000,000 |
Technology | CMOS |
Die | 156 mm² |
Word Size | 64 bit |
Cores | 8 |
Threads | 16 |
Max Memory | 64 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 35 W |
Tcase | 0 °C – 105 °C |
Packaging | |
Package | FP6 (FC-OBGA) |
Dimension | 35 mm × 25 mm × 1.38 mm |
Pitch | 0.65 mm |
Contacts | 1140 |
Ryzen 7 4800HS is a 64-bit octa-core high-end performance x86 mobile microprocessor introduced by AMD in early 2020. Fabricated on TSMC's 7-nanometer process and based on AMD's Zen 2 microarchitecture, the 4800HS operates at a base frequency of 2.9 GHz with a TDP of 35 W and a boost frequency of up to 4.2 GHz. This APU supports up to 64 GiB of DDR4-3200 or up to 32 GiB of quad-channel LPDDR4x-4266 memory. The 4800HS integrates Radeon Vega 7 graphics operating at up to 1.6 GHz.
This processor is identical to the 4800H except for its lower TDP.
Cache[edit]
- Main article: Zen 2 § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
This SoC features two memory controllers, each supporting DDR4 or LPDDR4x. This chip supports up to 64 GiB of dual-channel DDR4 memory with data rates of up to 3200 MT/s (51.2 GB/s) or up to 32 GiB of quad-channel LPDDR4x with data rates of up to 4266 MT/s (68.27 GB/s).
Integrated Memory Controller
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Expansions[edit]
This processor has 16 PCIe lanes, 1x8 designated for a discrete GPU, 1x4 additional lanes for storage (e.g., NVMe), and 1x4 additional lanes reserved for additional peripherals (e.g., WiFi or LTE).
Expansion Options |
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Graphics[edit]
Integrated Graphics Information
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[Edit] Zen 2 with Radeon Vega Hardware Accelerated Video Capabilities | |||||
---|---|---|---|---|---|
Codec | Encode | Decode | |||
VP9 8bpc/10bpc | 1080p240 4K 60 FPS | ||||
MPEG-2 (H.262) 8b | 1080p240 4K 60 FPS |
1080p480 4K 120 FPS | |||
HEVC (H.265) 8bpc/10bpc | 1080p240 4K 60 FPS |
1080p240 4K 60 FPS |
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Die[edit]
- Main article: Zen 2 § Die
Renoir microprocessors are fabricated on TSMC's 7-nanometer process. This SoC integrates 9.8 billion transistors on a single 156 mm² monolithic die which includes both the Zen 2 CPU cores along with the Vega GPU and various other additional components.
- 7-nanometer process (N7)
- 9,800,000,000 transistors
- 156 mm² die size
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Ryzen 7 4800HS - AMD#pcie + |
base frequency | 2,900 MHz (2.9 GHz, 2,900,000 kHz) + |
clock multiplier | 29 + |
core count | 8 + |
core name | Renoir + |
designer | AMD + |
die area | 156 mm² (0.242 in², 1.56 cm², 156,000,000 µm²) + |
family | Ryzen 7 + |
first announced | March 16, 2020 + |
first launched | March 16, 2020 + |
full page name | amd/ryzen 7/4800hs + |
has ecc memory support | false + |
has locked clock multiplier | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
l3$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
ldate | March 16, 2020 + |
manufacturer | TSMC + |
market segment | Mobile + |
max case temperature | 378.15 K (105 °C, 221 °F, 680.67 °R) + |
max cpu count | 1 + |
max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) + |
max memory bandwidth | 68.27 GiB/s (69,908.48 MiB/s, 73.304 GB/s, 73,304.354 MB/s, 0.0667 TiB/s, 0.0733 TB/s) + |
max memory channels | 4 + |
microarchitecture | Zen 2 + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | 4800HS + |
name | Ryzen 7 4800HS + |
process | 7 nm (0.007 μm, 7.0e-6 mm) + |
series | 4000 + |
smp max ways | 1 + |
supported memory type | DDR4-3200 + and LPDDR4x-4266 + |
tdp | 35 W (35,000 mW, 0.0469 hp, 0.035 kW) + |
technology | CMOS + |
thread count | 16 + |
transistor count | 9,800,000,000 + |
turbo frequency | 4,200 MHz (4.2 GHz, 4,200,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |