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Difference between revisions of "intel/microarchitectures/knights ferry"
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|predecessor=Rock Creek
 
|predecessor=Rock Creek
 
|predecessor link=intel/microarchitectures/rock creek
 
|predecessor link=intel/microarchitectures/rock creek
 +
|predecessor 2=Larrabee
 +
|predecessor 2 link=intel/microarchitectures/larrabee
 
|successor=Knights Corner
 
|successor=Knights Corner
 
|successor link=intel/microarchitectures/knights_corner
 
|successor link=intel/microarchitectures/knights_corner
 
}}
 
}}
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'''Knights Ferry''' ('''KNF''') was the successor to {{\\|Rock Creek}}, a [[45 nm]] [[many-core]] microarchitecture designed by [[intel]] for high performance computing.
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'''Knights Ferry''' ('''KNF''') was the successor to {{\\|Rock Creek}}, a [[45 nm]] [[many-core]] microarchitecture designed by [[Intel]] for high performance computing.
  
−
Note that Intel gave the [[PCIe card|PCIe]] [[expansion card]] the codename '''Aubrey Isle''' (die, components, board).
+
Note that [[Intel]] gave the PCIe expansion card the codename '''Aubrey Isle''' (die, components, board).
 +
 
 +
=== {{intel|CPUID}} ===
 +
{| class="wikitable"
 +
! Microarchitecture !! Core !! Extended <br>Family !! Family !! Extended <br>Model !! Model !! Family • Model
 +
|-
 +
| {{intel|Knights Corner|l=arch}} ([[2011]]) || [[62 cores]] ([[22 nm]]) || 0 || 0xB || 0x0 || 0x1 || [[Family 11 Model 1]]
 +
|-
 +
| {{intel|Knights Ferry|l=arch}} ([[2010]]) || [[32 cores]] ([[45 nm]]) || 0 || 0xB || 0x0 || 0x0 || [[Family 11 Model 0]]
 +
|-
 +
|}
  
 
== Architecture ==
 
== Architecture ==
−
=== Key changes from {{\\|Larrabee}} ===
 
 
{{empty section}}
 
{{empty section}}
  
 
== Die ==
 
== Die ==
 +
* [[45 nm process]]
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* 32 CPU cores
 +
 +
 
:[[File:knights ferry die.png|class=wikichip_ogimage|700px]]
 
:[[File:knights ferry die.png|class=wikichip_ogimage|700px]]
  
 
== Documents ==
 
== Documents ==
 
* [[:File:ISC 2010 Skaugen keynote.pdf|Petascale to Exascale, Extending Intel's HPC Commitment]]
 
* [[:File:ISC 2010 Skaugen keynote.pdf|Petascale to Exascale, Extending Intel's HPC Commitment]]
 +
 +
== See also ==
 +
:;[[Intel]] • {{intel|MIC Architecture}}
 +
* {{intel|Knights Ferry|l=arch}}
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* {{intel|Knights Corner|l=arch}}
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* {{intel|Knights Landing|l=arch}}
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* {{intel|Knights Mill|l=arch}}
 +
* <s>{{intel|Knights Hill|l=arch}}</s>
 +
* <s>{{intel|Knights Peak|l=arch}}</s>

Latest revision as of 02:48, 4 May 2025

Edit Values
Knights Ferry µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
IntroductionMay 31, 2010
Phase-out2011
Process45 nm
Core Configs32
Instructions
ISAx86
ExtensionsL1OM
Succession

Knights Ferry (KNF) was the successor to Rock Creek, a 45 nm many-core microarchitecture designed by Intel for high performance computing.

Note that Intel gave the PCIe expansion card the codename Aubrey Isle (die, components, board).

CPUID[edit]

Microarchitecture Core Extended
Family 		Family Extended
Model 		Model Family • Model
Knights Corner (2011) 62 cores (22 nm) 0 0xB 0x0 0x1 Family 11 Model 1
Knights Ferry (2010) 32 cores (45 nm) 0 0xB 0x0 0x0 Family 11 Model 0

Architecture[edit]

New text document.svg This section is empty; you can help add the missing info by editing this page.

Die[edit]


knights ferry die.png

Documents[edit]

See also[edit]

Intel • MIC Architecture
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/knights_ferry&oldid=103384"
Facts about "Knights Ferry - Microarchitectures - Intel"
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codenameKnights Ferry +
core count32 +
designerIntel +
first launchedMay 31, 2010 +
full page nameintel/microarchitectures/knights ferry +
instance ofmicroarchitecture +
instruction set architecturex86 +
manufacturerIntel +
microarchitecture typeCPU +
nameKnights Ferry +
phase-out2011 +
process45 nm (0.045 μm, 4.5e-5 mm) +