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Difference between revisions of "amd/ryzen 5/3500u"
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|series=3000 | |series=3000 | ||
|frequency=2,100 MHz | |frequency=2,100 MHz | ||
− | |turbo | + | |turbo frequency=3,700 MHz |
|bus type=PCIe 3.0 | |bus type=PCIe 3.0 | ||
|clock multiplier=21 | |clock multiplier=21 | ||
|isa=x86-64 | |isa=x86-64 | ||
|isa family=x86 | |isa family=x86 | ||
− | |microarch=Zen+ | + | |microarch=Zen+ |
|core name=Picasso | |core name=Picasso | ||
|process=12 nm | |process=12 nm | ||
Line 30: | Line 30: | ||
|max memory=64 GiB | |max memory=64 GiB | ||
|tdp=15 W | |tdp=15 W | ||
+ | |ctdp down=12 W | ||
+ | |ctdp up=35 W | ||
|temp min=0° C | |temp min=0° C | ||
|temp max=105 °C | |temp max=105 °C | ||
− | |package name 1=amd, | + | |package name 1=amd,fp5 |
}} | }} | ||
'''Ryzen 5 3500U''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[AMD]] in early [[2019]]. This processor is based on AMD's {{amd|Zen+|Zen+ microarchitecture|l=arch}} and is fabricated on a [[12 nm process]]. The 3500U operates at a base frequency of 2.1 GHz with a [[TDP]] of 15 W and a {{amd|Precision Boost|Boost}} frequency of 3.7 GHz. This APU supports up to 32 GiB of dual-channel DDR4-2400 memory and incorporates {{amd|Radeon Vega 8}} Graphics operating at up to 1.2 GHz. | '''Ryzen 5 3500U''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[AMD]] in early [[2019]]. This processor is based on AMD's {{amd|Zen+|Zen+ microarchitecture|l=arch}} and is fabricated on a [[12 nm process]]. The 3500U operates at a base frequency of 2.1 GHz with a [[TDP]] of 15 W and a {{amd|Precision Boost|Boost}} frequency of 3.7 GHz. This APU supports up to 32 GiB of dual-channel DDR4-2400 memory and incorporates {{amd|Radeon Vega 8}} Graphics operating at up to 1.2 GHz. | ||
+ | |||
+ | This model supports a configurable TDP-down of 12 W and TDP-up of 35 W. | ||
+ | |||
+ | |||
+ | == Cache == | ||
+ | {{main|amd/microarchitectures/zen+#Memory_Hierarchy|l1=Zen+ § Cache}} | ||
+ | {{cache size | ||
+ | |l1 cache=384 KiB | ||
+ | |l1i cache=256 KiB | ||
+ | |l1i break=4x64 KiB | ||
+ | |l1i desc=4-way set associative | ||
+ | |l1d cache=128 KiB | ||
+ | |l1d break=4x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l1d policy=write-back | ||
+ | |l2 cache=2 MiB | ||
+ | |l2 break=4x512 KiB | ||
+ | |l2 desc=8-way set associative | ||
+ | |l2 policy=write-back | ||
+ | |l3 cache=4 MiB | ||
+ | |l3 break=1x4 MiB | ||
+ | }} | ||
+ | |||
+ | == Memory controller == | ||
+ | {{memory controller | ||
+ | |type=DDR4-2400 | ||
+ | |ecc=Yes | ||
+ | |max mem=32 GiB | ||
+ | |controllers=2 | ||
+ | |channels=2 | ||
+ | |max bandwidth=35.76 GiB/s | ||
+ | |bandwidth schan=17.88 GiB/s | ||
+ | |bandwidth dchan=35.76 GiB/s | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | This processor has 12 PCIe lanes, 1x8 typically designated for a [[GPU]] and 4 additional lanes for storage (e.g., NVMe). | ||
+ | {{expansions main | ||
+ | | | ||
+ | {{expansions entry | ||
+ | |type=PCIe | ||
+ | |pcie revision=3.0 | ||
+ | |pcie lanes=12 | ||
+ | |pcie config=1x8+1x4 | ||
+ | |pcie config 2=2x4+1x4 | ||
+ | }} | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | {{integrated graphics | ||
+ | | gpu = Radeon Vega 8 | ||
+ | | device id = | ||
+ | | designer = AMD | ||
+ | | execution units = 8 | ||
+ | | unified shaders = 512 | ||
+ | | max displays = 4 | ||
+ | | max memory = | ||
+ | | frequency = | ||
+ | | max frequency = 1,200 MHz | ||
+ | |||
+ | | output crt = | ||
+ | | output sdvo = | ||
+ | | output dsi = | ||
+ | | output edp = | ||
+ | | output dp = Yes | ||
+ | | output hdmi = Yes | ||
+ | | output vga = | ||
+ | | output dvi = | ||
+ | |||
+ | | directx ver = 12 | ||
+ | | opengl ver = 4.6 | ||
+ | | opencl ver = 2.2 | ||
+ | | hdmi ver = | ||
+ | | dp ver = | ||
+ | | edp ver = | ||
+ | | max res hdmi = | ||
+ | | max res hdmi freq = | ||
+ | | max res dp = | ||
+ | | max res dp freq = | ||
+ | | max res edp = | ||
+ | | max res edp freq = | ||
+ | | max res vga = | ||
+ | | max res vga freq = | ||
+ | }} | ||
+ | {{zen with vega hardware accelerated video table|col=1}} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=Yes | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
+ | |avx512f=No | ||
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |abm=Yes | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=Yes | ||
+ | |xop=No | ||
+ | |adx=Yes | ||
+ | |clmul=Yes | ||
+ | |f16c=Yes | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=No | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=No | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=No | ||
+ | |vtd=No | ||
+ | |ept=No | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=Yes | ||
+ | |amdv=Yes | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=Yes | ||
+ | |sensemi=Yes | ||
+ | |xfr=No | ||
+ | |mxfr=No | ||
+ | |amdpb=No | ||
+ | |amdpb2=No | ||
+ | }} | ||
+ | |||
+ | == Die == | ||
+ | {{further|amd/microarchitectures/zen+#Die|l1=Zen+ § Die}} | ||
+ | * [[14 nm process]] | ||
+ | * 4,940,000,000 transistors | ||
+ | * 209.78 mm² die size | ||
+ | |||
+ | |||
+ | : [[File:raven ridge die.png|650px]] | ||
+ | |||
+ | |||
+ | : [[File:raven ridge die (annotated).png|650px]] |
Latest revision as of 00:23, 26 March 2023
Edit Values | |
Ryzen 5 3500U | |
General Info | |
Designer | AMD |
Manufacturer | GlobalFoundries |
Model Number | 3500U |
Part Number | YM3500C4T4MFG |
Market | Mobile |
Introduction | January 6, 2019 (announced) January 6, 2019 (launched) |
Shop | Amazon |
General Specs | |
Family | Ryzen 5 |
Series | 3000 |
Frequency | 2,100 MHz |
Turbo Frequency | 3,700 MHz |
Bus type | PCIe 3.0 |
Clock multiplier | 21 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Zen+ |
Core Name | Picasso |
Process | 12 nm |
Transistors | 4,940,000,000 |
Technology | CMOS |
Die | 209.78 mm² |
Word Size | 64 bit |
Cores | 4 |
Threads | 8 |
Max Memory | 64 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 15 W |
cTDP down | 12 W |
cTDP up | 35 W |
OP Temperature | 0° C – 105 °C |
Packaging | |
Package | FP5 |
Package Type | Organic Micro Ball Grid Array |
Dimension | 35 mm × 25 mm |
Pitch | 0.7 mm |
Contacts | 1140 |
Ryzen 5 3500U is a 64-bit quad-core mid-range performance x86 mobile microprocessor introduced by AMD in early 2019. This processor is based on AMD's Zen+ microarchitecture and is fabricated on a 12 nm process. The 3500U operates at a base frequency of 2.1 GHz with a TDP of 15 W and a Boost frequency of 3.7 GHz. This APU supports up to 32 GiB of dual-channel DDR4-2400 memory and incorporates Radeon Vega 8 Graphics operating at up to 1.2 GHz.
This model supports a configurable TDP-down of 12 W and TDP-up of 35 W.
Cache[edit]
- Main article: Zen+ § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
This processor has 12 PCIe lanes, 1x8 typically designated for a GPU and 4 additional lanes for storage (e.g., NVMe).
![]() |
Expansion Options |
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Graphics[edit]
![]() |
Integrated Graphics Information
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[Edit] Zen with Radeon Vega Hardware Accelerated Video Capabilities | |||||
---|---|---|---|---|---|
Codec | Encode | Decode | |||
Max FPS | @1080p | @1440p | @2160p | @1080p 4:2:0 | @2160p 4:2:0 |
MPEG-2 (H.262) | 60 FPS | N/A | |||
VC-1 | |||||
VP9 8bpc | 240 FPS | 60 FPS | |||
VP9 10bpc | |||||
MPEG-4 AVC (H.264) 8bpc | 120 FPS | 60 FPS | 30 FPS | ||
MPEG-4 AVC (H.264) 10bpc | |||||
HEVC (H.265) 8bpc | 120 FPS | 60 FPS | 30 FPS | ||
HEVC (H.265) 10bpc | |||||
JPEG/MJPEG 8bpc |
Features[edit]
[Edit/Modify Supported Features]
![]() |
Supported x86 Extensions & Processor Features
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Die[edit]
- Further information: Zen+ § Die
- 14 nm process
- 4,940,000,000 transistors
- 209.78 mm² die size
Facts about "Ryzen 5 3500U - AMD"
base frequency | 2,100 MHz (2.1 GHz, 2,100,000 kHz) + |
bus type | PCIe 3.0 + |
clock multiplier | 21 + |
core count | 4 + |
core name | Picasso + |
designer | AMD + |
die area | 209.78 mm² (0.325 in², 2.098 cm², 209,780,000 µm²) + |
family | Ryzen 5 + |
first announced | January 6, 2019 + |
first launched | January 6, 2019 + |
full page name | amd/ryzen 5/3500u + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
ldate | January 6, 2019 + |
manufacturer | GlobalFoundries + |
market segment | Mobile + |
max cpu count | 1 + |
max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) + |
max operating temperature | 105 °C + |
microarchitecture | Zen+Picasso + |
min operating temperature | 0° C + |
model number | 3500U + |
name | Ryzen 5 3500U + |
part number | YM3500C4T4MFG + |
process | 12 nm (0.012 μm, 1.2e-5 mm) + |
series | 3000 + |
smp max ways | 1 + |
tdp | 15 W (15,000 mW, 0.0201 hp, 0.015 kW) + |
technology | CMOS + |
thread count | 8 + |
transistor count | 4,940,000,000 + |
turbo frequency (1 core) | 3,700 MHz (3.7 GHz, 3,700,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |