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Difference between revisions of "amd/ryzen threadripper/2950x"
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{{amd title|Ryzen Threadripper 2950X}} | {{amd title|Ryzen Threadripper 2950X}} | ||
{{chip | {{chip | ||
− | |||
|name=Ryzen Threadripper 2950X | |name=Ryzen Threadripper 2950X | ||
|no image=Yes | |no image=Yes | ||
Line 7: | Line 6: | ||
|manufacturer=GlobalFoundries | |manufacturer=GlobalFoundries | ||
|model number=2950X | |model number=2950X | ||
+ | |part number=YD295XA8UGAAF | ||
|market=Desktop | |market=Desktop | ||
− | |first announced=August, 2018 | + | |first announced=August 6, 2018 |
− | |first launched=August, 2018 | + | |first launched=August 31, 2018 |
+ | |release price=$899.00 | ||
|family=Ryzen Threadripper | |family=Ryzen Threadripper | ||
|series=Ryzen | |series=Ryzen | ||
|locked=No | |locked=No | ||
− | |frequency=3, | + | |frequency=3,500 MHz |
+ | |turbo frequency=4,400 MHz | ||
|bus links=4 | |bus links=4 | ||
|bus rate=8 GT/s | |bus rate=8 GT/s | ||
− | |clock multiplier= | + | |clock multiplier=35 |
|isa=x86-64 | |isa=x86-64 | ||
|isa family=x86 | |isa family=x86 | ||
|microarch=Zen+ | |microarch=Zen+ | ||
+ | |chipset=x399 | ||
+ | |core name=Colfax | ||
|core family=23 | |core family=23 | ||
+ | |core model=8 | ||
+ | |core stepping=2 | ||
|process=12 nm | |process=12 nm | ||
+ | |transistors=9,600,000,000 | ||
|technology=CMOS | |technology=CMOS | ||
|die area=213 mm² | |die area=213 mm² | ||
|mcp=Yes | |mcp=Yes | ||
− | |die count= | + | |die count=2 |
|word size=64 bit | |word size=64 bit | ||
|core count=16 | |core count=16 | ||
|thread count=32 | |thread count=32 | ||
+ | |max memory=2 TiB | ||
|max cpus=1 | |max cpus=1 | ||
− | |tdp= | + | |tdp=180 W |
+ | |package name 1=amd,socket_tr4 | ||
+ | |predecessor=Threadripper 1950X | ||
+ | |predecessor link=amd/ryzen_threadripper/1950x | ||
}} | }} | ||
− | '''Ryzen Threadripper 2950X''' is a {{arch|64}} [[hexadeca-core]] high-performance [[x86]] desktop [[microprocessor]] introduced by [[AMD]] in mid-[[2018]]. The 2950X, which is based on their {{amd|Zen+|Zen+ microarchitecture|l=arch}}, is fabricated on a [[12 nm process]]. The 2950X operates at a base frequency of 3. | + | '''Ryzen Threadripper 2950X''' is a {{arch|64}} [[hexadeca-core]] high-performance [[x86]] desktop [[microprocessor]] introduced by [[AMD]] in mid-[[2018]]. The 2950X, which is based on their {{amd|Zen+|Zen+ microarchitecture|l=arch}}, is fabricated on a [[12 nm process]]. The 2950X operates at a base frequency of 3.5 GHz with a [[TDP]] of 180 W and a {{amd|precision boost|boost}} of up to 4.4 GHz. This MPU supports up to 2 TiB of quad-channel DDR4-2933 memory. |
− | |||
− | |||
− | {{ | ||
− | |||
== Cache == | == Cache == | ||
− | {{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}} | + | {{main|amd/microarchitectures/zen+#Memory_Hierarchy|l1=Zen+ § Cache}} |
{{cache size | {{cache size | ||
|l1 cache=1.5 MiB | |l1 cache=1.5 MiB | ||
Line 53: | Line 60: | ||
|l2 desc=8-way set associative | |l2 desc=8-way set associative | ||
|l2 policy=write-back | |l2 policy=write-back | ||
− | |l3 cache= | + | |l3 cache=32 MiB |
− | |l3 break= | + | |l3 break=4x8 MiB |
|l3 desc=16-way set associative | |l3 desc=16-way set associative | ||
− | | | + | }} |
+ | |||
+ | == Memory controller == | ||
+ | This processor supports up to 512 GiB per memory channel for a total of 2 TiB. | ||
+ | {{memory controller | ||
+ | |type=DDR4-2933 | ||
+ | |ecc=Yes | ||
+ | |max mem=2 TiB | ||
+ | |controllers=4 | ||
+ | |channels=4 | ||
+ | |max bandwidth=87.42 GiB/s | ||
+ | |bandwidth schan=21.86 GiB/s | ||
+ | |bandwidth dchan=43.71 GiB/s | ||
+ | |bandwidth qchan=87.42 GiB/s | ||
+ | }} | ||
+ | |||
+ | {{amd ryzen threadripper 2 memory configs}} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions main | ||
+ | | | ||
+ | {{expansions entry | ||
+ | |type=PCIe | ||
+ | |pcie revision=3.0 | ||
+ | |pcie lanes=60 | ||
+ | |pcie config=x16 | ||
+ | |pcie config 2=x8 | ||
+ | |pcie config 3=x4 | ||
+ | |pcie config 4=x2 | ||
+ | }} | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | This processor has no integrated graphics. | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=Yes | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
+ | |avx512f=No | ||
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |abm=Yes | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=Yes | ||
+ | |xop=No | ||
+ | |adx=Yes | ||
+ | |clmul=Yes | ||
+ | |f16c=Yes | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=No | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=No | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=No | ||
+ | |vtd=No | ||
+ | |ept=No | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=Yes | ||
+ | |amdv=Yes | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=Yes | ||
+ | |sensemi=Yes | ||
+ | |xfr=No | ||
+ | |xfr2=Yes | ||
+ | |mxfr=No | ||
+ | |amdpb=No | ||
+ | |amdpb2=Yes | ||
+ | |amdpbod=Yes | ||
}} | }} |
Latest revision as of 09:39, 30 November 2020
Edit Values | |
Ryzen Threadripper 2950X | |
General Info | |
Designer | AMD |
Manufacturer | GlobalFoundries |
Model Number | 2950X |
Part Number | YD295XA8UGAAF |
Market | Desktop |
Introduction | August 6, 2018 (announced) August 31, 2018 (launched) |
Release Price | $899.00 |
Shop | Amazon |
General Specs | |
Family | Ryzen Threadripper |
Series | Ryzen |
Locked | No |
Frequency | 3,500 MHz |
Turbo Frequency | 4,400 MHz |
Bus rate | 4 × 8 GT/s |
Clock multiplier | 35 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Zen+ |
Chipset | x399 |
Core Name | Colfax |
Core Family | 23 |
Core Model | 8 |
Core Stepping | 2 |
Process | 12 nm |
Transistors | 9,600,000,000 |
Technology | CMOS |
Die | 213 mm² |
MCP | Yes (2 dies) |
Word Size | 64 bit |
Cores | 16 |
Threads | 32 |
Max Memory | 2 TiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 180 W |
Packaging | |
Package | TR4, FCLGA-4094 (FC-OLGA) |
Dimension | 75.4 mm × 58.5 mm × 6.26 mm |
Pitch | 0.87 mm × 1 mm |
Contacts | 4094 |
Socket | TR4, SP3r2, sTR4 |
Succession | |
Ryzen Threadripper 2950X is a 64-bit hexadeca-core high-performance x86 desktop microprocessor introduced by AMD in mid-2018. The 2950X, which is based on their Zen+ microarchitecture, is fabricated on a 12 nm process. The 2950X operates at a base frequency of 3.5 GHz with a TDP of 180 W and a boost of up to 4.4 GHz. This MPU supports up to 2 TiB of quad-channel DDR4-2933 memory.
Cache[edit]
- Main article: Zen+ § Cache
![]() |
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
This processor supports up to 512 GiB per memory channel for a total of 2 TiB.
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Integrated Memory Controller
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[Edit] Official AMD Supported Memory Configurations | ||||
---|---|---|---|---|
Quad Channel | Single Rank | 1 DIMM per channel | 4 of 4 | DDR4-2933 |
4 of 8 | DDR4-2666 | |||
2 DIMMs per channel | 8 of 8 | DDR4-2133 | ||
Dual Rank | 1 DIMM per channel | 4 of 4 | DDR4-2933 | |
4 of 8 | DDR4-2666 | |||
2 DIMMs per channel | 8 of 8 | DDR4-1866 |
Expansions[edit]
![]() |
Expansion Options |
||||
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Graphics[edit]
This processor has no integrated graphics.
Features[edit]
[Edit/Modify Supported Features]
Facts about "Ryzen Threadripper 2950X - AMD"
base frequency | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
clock multiplier | 31 + |
core count | 16 + |
core family | 23 + |
designer | AMD + |
die area | 213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) + |
die count | 4 + |
family | Ryzen Threadripper + |
first announced | August 2018 + |
first launched | August 2018 + |
full page name | amd/ryzen threadripper/2950x + |
has locked clock multiplier | false + |
instance of | microprocessor + |
is multi-chip package | true + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 1,024 KiB (1,048,576 B, 1 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 64 MiB (65,536 KiB, 67,108,864 B, 0.0625 GiB) + |
ldate | 3000 + |
manufacturer | GlobalFoundries + |
market segment | Desktop + |
max cpu count | 1 + |
microarchitecture | Zen+ + |
model number | 2950X + |
name | Ryzen Threadripper 2950X + |
process | 12 nm (0.012 μm, 1.2e-5 mm) + |
series | Ryzen + |
smp max ways | 1 + |
tdp | 125 W (125,000 mW, 0.168 hp, 0.125 kW) + |
technology | CMOS + |
thread count | 32 + |
word size | 64 bit (8 octets, 16 nibbles) + |