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Difference between revisions of "intel/microarchitectures/larrabee"
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{{intel title|Larrabee|arch}}
 
{{intel title|Larrabee|arch}}
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{{microarchitecture}}
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{{microarchitecture
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'''Larrabee''' ('''LRB''') was an experimental [[graphics processing unit]] [[microarchitecture]] designed by [[Intel]] for [[gpgpu|General-purpose GPU computing]].
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|atype=GPU
 +
|name=Larrabee
 +
|designer=Intel
 +
|manufacturer=Intel
 +
|introduction=August 12, 2008
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|phase-out=2010
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|process=45 nm
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|process 2=32 nm
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|cores=8
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|cores 2=16
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|cores 3=24
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|cores 4=32
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|cores 5=40
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|cores 6=48
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|isa=x86
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|extension=L1OM
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|predecessor=Polaris
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|predecessor link=intel/microarchitectures/polaris
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}}
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'''Larrabee''' ('''LRB''') was an experimental [[graphics processing unit]] [[microarchitecture]] designed by [[Intel]] for [[gpgpu|General-purpose GPU computing]] which built on the earlier {{\\|Polaris|Polaris research chip}}.

Latest revision as of 02:49, 31 March 2019

Edit Values
Larrabee µarch
General Info
Arch TypeGPU
DesignerIntel
ManufacturerIntel
IntroductionAugust 12, 2008
Phase-out2010
Process45 nm, 32 nm
Core Configs8, 16, 24, 32, 40, 48
Instructions
ISAx86
ExtensionsL1OM
Succession

Larrabee (LRB) was an experimental graphics processing unit microarchitecture designed by Intel for General-purpose GPU computing which built on the earlier Polaris research chip.

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/larrabee&oldid=87434"
Facts about "Larrabee - Microarchitectures - Intel"
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codenameLarrabee +
core count8 +, 16 +, 24 +, 32 +, 40 + and 48 +
designerIntel +
first launchedAugust 12, 2008 +
full page nameintel/microarchitectures/larrabee +
instance ofmicroarchitecture +
instruction set architecturex86 +
manufacturerIntel +
microarchitecture typeGPU +
nameLarrabee +
phase-out2010 +
process45 nm (0.045 μm, 4.5e-5 mm) + and 32 nm (0.032 μm, 3.2e-5 mm) +