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Difference between revisions of "intel/xeon d/d-2166nt"
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|market=Server
 
|market=Server
 
|market 2=Embedded
 
|market 2=Embedded
 +
|first announced=February 7, 2018
 +
|first launched=February 7, 2018
 
|release price=$1,005.00
 
|release price=$1,005.00
 
|family=Xeon D
 
|family=Xeon D
Line 23: Line 25:
 
|isa family=x86
 
|isa family=x86
 
|microarch=Skylake (server)
 
|microarch=Skylake (server)
|core name=Skylake-DE
+
|core name=Skylake DE
 
|core stepping=M1
 
|core stepping=M1
 
|process=14 nm
 
|process=14 nm
Line 35: Line 37:
 
|max memory=512 GiB
 
|max memory=512 GiB
 
|tdp=85 W
 
|tdp=85 W
 +
|tcase min=0 °C
 +
|tcase max=90 °C
 +
|package module 1={{packages/intel/fcbga-2518}}
 
}}
 
}}
'''Xeon D-2166NT''' is a {{arch|64}} [[dodeca-core]] high-performance [[x86]] microserver processor set to be introduced by [[Intel]] in early [[2018]]. Fabricated on Intel's [[14 nm process|14nm+ process]] based on the {{intel|Skylake (server)|l=arch|Skylake microarchitecture}}, this chip operates at ? GHz with a [[TDP]] of ? W.
+
'''Xeon D-2166NT''' is a {{arch|64}} [[12-core]] high-performance [[x86]] server microprocessor introduced by [[Intel]] in early 2018 for the dense server and [[edge computing]] market segment. Fabricated on Intel's [[14 nm process]] based on the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture, this model operates at 2.0 GHz with a {{intel|Turbo Boost}} of up to 3.0 GHz and a [[TDP]] of 85 W. The D-2166NT supports up to 512 GiB of quad-chanel DDR4-2133 ECC memory. This model is part of {{intel|Skylake DE|l=core}}'s [[part of::Integrated QuickAssist Technology SKUs]].
  
  
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== Memory controller ==
 
== Memory controller ==
 
{{memory controller
 
{{memory controller
|type=DDR4-2666
+
|type=DDR4-2133
 
|ecc=Yes
 
|ecc=Yes
 
|max mem=512 GiB
 
|max mem=512 GiB
Line 71: Line 76:
 
|channels=4
 
|channels=4
 
|max bandwidth=79.47 GiB/s
 
|max bandwidth=79.47 GiB/s
|bandwidth schan=19.87 GiB/s
+
|bandwidth schan=15.89 GiB/s
|bandwidth dchan=39.74 GiB/s
+
|bandwidth dchan=31.78 GiB/s
|bandwidth qchan=79.47 GiB/s
+
|bandwidth qchan=63.57 GiB/s
 +
|pae=46 bit
 
}}
 
}}
  
 
== Expansions ==
 
== Expansions ==
 +
This chip incorporates 20 high-speed I/O (HSIO) lanes that may be configured as up to 20 [[PCIe]] lanes, up to 14 SATA 3.0 ports, or up to 4 USB 3.0 ports.
 
{{expansions main
 
{{expansions main
 
|
 
|
Line 82: Line 89:
 
|type=PCIe
 
|type=PCIe
 
|pcie revision=3.0
 
|pcie revision=3.0
|pcie lanes=48
+
|pcie lanes=32
 
|pcie config=x16
 
|pcie config=x16
 
|pcie config 2=x8
 
|pcie config 2=x8
 
|pcie config 3=x4
 
|pcie config 3=x4
 
}}
 
}}
 +
{{expansions entry
 +
|type=HSIO
 +
|hsio lanes=20
 +
}}
 +
}}
 +
== Networking ==
 +
{{network
 +
|eth opts=Yes
 +
|10ge=Yes
 +
|10ge ports=4
 
}}
 
}}
 
 
== Features ==  
 
== Features ==  
 
{{x86 features
 
{{x86 features
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|avx5124vnniw=No
 
|avx5124vnniw=No
 
|avx512vpopcntdq=No
 
|avx512vpopcntdq=No
|avx512units=2
+
|avx512units=1
 
|abm=Yes
 
|abm=Yes
 
|tbm=No
 
|tbm=No
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|securekey=Yes
 
|securekey=Yes
 
|osguard=Yes
 
|osguard=Yes
|intqat=No
+
|intqat=Yes
 
|3dnow=No
 
|3dnow=No
 
|e3dnow=No
 
|e3dnow=No
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|sensemi=No
 
|sensemi=No
 
|xfr=No
 
|xfr=No
 +
|mxfr=No
 +
|amdpb=No
 +
|amdpb2=No
 +
}}
 +
 +
== Frequencies ==
 +
{{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}}
 +
{{frequency table
 +
|freq_base=2,000 MHz
 +
|freq_1=3,000 MHz
 +
|freq_2=3,000 MHz
 +
|freq_3=2,800 MHz
 +
|freq_4=2,800 MHz
 +
|freq_5=2,600 MHz
 +
|freq_6=2,600 MHz
 +
|freq_7=2,600 MHz
 +
|freq_8=2,600 MHz
 +
|freq_9=2,300 MHz
 +
|freq_10=2,300 MHz
 +
|freq_11=2,300 MHz
 +
|freq_12=2,300 MHz
 +
|freq_avx2_1=2,900 MHz
 +
|freq_avx2_2=2,900 MHz
 +
|freq_avx2_3=2,700 MHz
 +
|freq_avx2_4=2,700 MHz
 +
|freq_avx2_5=2,400 MHz
 +
|freq_avx2_6=2,400 MHz
 +
|freq_avx2_7=2,400 MHz
 +
|freq_avx2_8=2,400 MHz
 +
|freq_avx2_9=2,100 MHz
 +
|freq_avx2_10=2,100 MHz
 +
|freq_avx2_11=2,100 MHz
 +
|freq_avx2_12=2,100 MHz
 +
|freq_avx512_1=2,800 MHz
 +
|freq_avx512_2=2,800 MHz
 +
|freq_avx512_3=2,600 MHz
 +
|freq_avx512_4=2,600 MHz
 +
|freq_avx512_5=2,200 MHz
 +
|freq_avx512_6=2,200 MHz
 +
|freq_avx512_7=2,200 MHz
 +
|freq_avx512_8=2,200 MHz
 +
|freq_avx512_9=1,900 MHz
 +
|freq_avx512_10=1,900 MHz
 +
|freq_avx512_11=1,900 MHz
 +
|freq_avx512_12=1,900 MHz
 
}}
 
}}

Latest revision as of 23:08, 7 February 2018

Edit Values
Xeon D-2166NT
skylake-de (front).png
General Info
DesignerIntel
ManufacturerIntel
Model NumberD-2166NT
Part NumberFH8067303784301
S-SpecSR3ZX
MarketServer, Embedded
IntroductionFebruary 7, 2018 (announced)
February 7, 2018 (launched)
Release Price$1,005.00
ShopAmazon
General Specs
FamilyXeon D
SeriesD-2000
LockedYes
Frequency2,000 MHz
Turbo Frequency3,000 MHz (1 core)
Bus typeDMI 3.0
Bus rate4 × 8 GT/s
Clock multiplier20
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSkylake (server)
Core NameSkylake DE
Core SteppingM1
Process14 nm
TechnologyCMOS
MCPYes (2 dies)
Word Size64 bit
Cores12
Threads24
Max Memory512 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP85 W
Tcase0 °C – 90 °C
Packaging
PackageFCBGA-2518 (BGA)
Dimension45 mm x 52.5 mm
Contacts2518

Xeon D-2166NT is a 64-bit 12-core high-performance x86 server microprocessor introduced by Intel in early 2018 for the dense server and edge computing market segment. Fabricated on Intel's 14 nm process based on the Skylake microarchitecture, this model operates at 2.0 GHz with a Turbo Boost of up to 3.0 GHz and a TDP of 85 W. The D-2166NT supports up to 512 GiB of quad-chanel DDR4-2133 ECC memory. This model is part of Skylake DE's Integrated QuickAssist Technology SKUs.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache[edit]

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$768 KiB
786,432 B
0.75 MiB
L1I$384 KiB
393,216 B
0.375 MiB
12x32 KiB8-way set associative 
L1D$384 KiB
393,216 B
0.375 MiB
12x32 KiB8-way set associativewrite-back

L2$12 MiB
12,288 KiB
12,582,912 B
0.0117 GiB
  12x1 MiB16-way set associativewrite-back

L3$16.5 MiB
16,896 KiB
17,301,504 B
0.0161 GiB
  12x1.375 MiB11-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2133
Supports ECCYes
Max Mem512 GiB
Controllers2
Channels4
Max Bandwidth79.47 GiB/s
81,377.28 MiB/s
85.33 GB/s
85,330.263 MB/s
0.0776 TiB/s
0.0853 TB/s
Bandwidth
Single 15.89 GiB/s
Double 31.78 GiB/s
Quad 63.57 GiB/s
Physical Address (PAE)46 bit

Expansions[edit]

This chip incorporates 20 high-speed I/O (HSIO) lanes that may be configured as up to 20 PCIe lanes, up to 14 SATA 3.0 ports, or up to 4 USB 3.0 ports.

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 32
Configuration: x16, x8, x4
HSIOMax Lanes: 20

Networking[edit]

[Edit/Modify Network Info]

ethernet plug icon.svg
Networking
Ethernet
10GbEYes (Ports: 4)

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
AVX-512Advanced Vector 512-bit (1 Unit)
AVX512FAVX-512 Foundation
AVX512CDAVX-512 Conflict Detection
AVX512BWAVX-512 Byte and Word
AVX512DQAVX-512 Doubleword and Quadword Instructions
AVX512VLAVX-512 Vector Length
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
SSTSpeed Shift Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
VMDVolume Management Device
IPTIdentity Protection Technology
QATIntegrated QuickAssist Technology

Frequencies[edit]

See also: Intel's CPU Frequency Behavior

[Modify Frequency Info]

ModeBaseTurbo Frequency/Active Cores
123456789101112
Normal2,000 MHz3,000 MHz3,000 MHz2,800 MHz2,800 MHz2,600 MHz2,600 MHz2,600 MHz2,600 MHz2,300 MHz2,300 MHz2,300 MHz2,300 MHz
AVX22,900 MHz2,900 MHz2,700 MHz2,700 MHz2,400 MHz2,400 MHz2,400 MHz2,400 MHz2,100 MHz2,100 MHz2,100 MHz2,100 MHz
AVX5122,800 MHz2,800 MHz2,600 MHz2,600 MHz2,200 MHz2,200 MHz2,200 MHz2,200 MHz1,900 MHz1,900 MHz1,900 MHz1,900 MHz
Facts about "Xeon D-2166NT - Intel"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon D-2166NT - Intel#package + and Xeon D-2166NT - Intel#pcie +
base frequency2,000 MHz (2 GHz, 2,000,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
clock multiplier20 +
core count12 +
core nameSkylake DE +
core steppingM1 +
designerIntel +
die count2 +
familyXeon D +
first announcedFebruary 7, 2018 +
first launchedFebruary 7, 2018 +
full page nameintel/xeon d/d-2166nt +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has advanced vector extensions 512true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Transactional Synchronization Extensions +, Secure Key Technology +, OS Guard +, Identity Protection Technology +, Integrated QuickAssist Technology +, Extended Page Tables +, Memory Protection Extensions + and Advanced Vector Extensions 512 +
has integrated intel quickassist technologytrue +
has intel enhanced speedstep technologytrue +
has intel identity protection technology supporttrue +
has intel secure key technologytrue +
has intel speed shift technologytrue +
has intel supervisor mode execution protectiontrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
is multi-chip packagetrue +
isax86-64 +
isa familyx86 +
l1$ size768 KiB (786,432 B, 0.75 MiB) +
l1d$ description8-way set associative +
l1d$ size384 KiB (393,216 B, 0.375 MiB) +
l1i$ description8-way set associative +
l1i$ size384 KiB (393,216 B, 0.375 MiB) +
l2$ description16-way set associative +
l2$ size12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) +
l3$ description11-way set associative +
l3$ size16.5 MiB (16,896 KiB, 17,301,504 B, 0.0161 GiB) +
ldateFebruary 7, 2018 +
main imageFile:skylake-de (front).png +
manufacturerIntel +
market segmentServer + and Embedded +
max case temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max cpu count1 +
max hsio lanes20 +
max memory524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) +
max memory bandwidth79.47 GiB/s (81,377.28 MiB/s, 85.33 GB/s, 85,330.263 MB/s, 0.0776 TiB/s, 0.0853 TB/s) +
max memory channels4 +
microarchitectureSkylake (server) +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model numberD-2166NT +
nameXeon D-2166NT +
number of avx-512 execution units1 +
packageFCBGA-2518 +
part numberFH8067303784301 +
part ofIntegrated QuickAssist Technology SKUs +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 1,005.00 (€ 904.50, £ 814.05, ¥ 103,846.65) +
s-specSR3ZX +
seriesD-2000 +
smp max ways1 +
supported memory typeDDR4-2133 +
tdp85 W (85,000 mW, 0.114 hp, 0.085 kW) +
technologyCMOS +
thread count24 +
turbo frequency (1 core)3,000 MHz (3 GHz, 3,000,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +