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Difference between revisions of "zhaoxin/kaixian/kx-5640"
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|bus links=4 | |bus links=4 | ||
|bus rate=8 GT/s | |bus rate=8 GT/s | ||
+ | |clock multiplier=20 | ||
|isa=x86-64 | |isa=x86-64 | ||
|isa family=x86 | |isa family=x86 | ||
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}} | }} | ||
'''KaiXian KX-5640''' is a {{arch|64}} [[quad-core]] [[x86]] microprocessor designed by [[Zhaoxin]] and introduced in late [[2017]] specifically for the [[Chinese]] market. This processor is fabricated on a [[28 nm process]] based on the {{zhaoxin|WuDaoKou|l=arch}} microarchitecture. The KX-5640 operates at 2 GHz with a TDP of ? W and supports up to 64 GiB of dual-channel DDR4-2133 memory. The KX-5640 also incorporates an integrated graphics processor. | '''KaiXian KX-5640''' is a {{arch|64}} [[quad-core]] [[x86]] microprocessor designed by [[Zhaoxin]] and introduced in late [[2017]] specifically for the [[Chinese]] market. This processor is fabricated on a [[28 nm process]] based on the {{zhaoxin|WuDaoKou|l=arch}} microarchitecture. The KX-5640 operates at 2 GHz with a TDP of ? W and supports up to 64 GiB of dual-channel DDR4-2133 memory. The KX-5640 also incorporates an integrated graphics processor. | ||
+ | |||
+ | |||
+ | {{unknown features}} | ||
+ | |||
+ | |||
+ | == Cache == | ||
+ | {{main|zhaoxin/microarchitectures/wudaokou#Memory_Hierarchy|l1=WuDaoKou § Cache}} | ||
+ | {{cache size | ||
+ | |l1 cache=256 KiB | ||
+ | |l1i cache=128 KiB | ||
+ | |l1i break=4x32 KiB | ||
+ | |l1i desc=8-way set associative | ||
+ | |l1d cache=128 KiB | ||
+ | |l1d break=4x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l2 cache=4 MiB | ||
+ | |l2 break=1x4 MiB | ||
+ | |l2 desc=32-way set associative | ||
+ | }} | ||
+ | |||
+ | == Memory controller == | ||
+ | {{memory controller | ||
+ | |type=DDR4-2133 | ||
+ | |ecc=No | ||
+ | |max mem=64 GiB | ||
+ | |controllers=1 | ||
+ | |channels=2 | ||
+ | |max bandwidth=31.79 GiB/s | ||
+ | |bandwidth schan=15.89 GiB/s | ||
+ | |bandwidth dchan=31.79 GiB/s | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions main | ||
+ | | | ||
+ | {{expansions entry | ||
+ | |type=PCIe | ||
+ | |pcie revision=3.0 | ||
+ | |pcie lanes=24 | ||
+ | }} | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | {{integrated graphics | ||
+ | | gpu = ? | ||
+ | | device id = | ||
+ | | designer = Zhaoxin | ||
+ | | execution units = | ||
+ | | max displays = 3 | ||
+ | | max memory = | ||
+ | | frequency = ? MHz | ||
+ | | max frequency = | ||
+ | |||
+ | | output crt = | ||
+ | | output sdvo = | ||
+ | | output dsi = | ||
+ | | output edp = Yes | ||
+ | | output dp = Yes | ||
+ | | output hdmi = Yes | ||
+ | | output vga = Yes | ||
+ | | output dvi = | ||
+ | |||
+ | | directx ver = 11.1 | ||
+ | | opengl ver = | ||
+ | | opencl ver = | ||
+ | | hdmi ver = 1.4b | ||
+ | | dp ver = 1.2a | ||
+ | | edp ver = 1.3 | ||
+ | | max res hdmi = 4096x2304 | ||
+ | | max res hdmi freq = | ||
+ | | max res dp = 4096x2304 | ||
+ | | max res dp freq = 60 Hz | ||
+ | | max res edp = 4096x2304 | ||
+ | | max res edp freq = 60 Hz | ||
+ | | max res vga = | ||
+ | | max res vga freq = | ||
+ | }} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=No | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
+ | |avx512f=No | ||
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |abm=No | ||
+ | |tbm=No | ||
+ | |bmi1=No | ||
+ | |bmi2=No | ||
+ | |fma3=No | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=Yes | ||
+ | |xop=No | ||
+ | |adx=No | ||
+ | |clmul=No | ||
+ | |f16c=No | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=No | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=Yes | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=Yes | ||
+ | |vtd=No | ||
+ | |ept=Yes | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
+ | |mxfr=No | ||
+ | |amdpb=No | ||
+ | |amdpb2=No | ||
+ | }} |
Latest revision as of 23:27, 26 May 2018
Edit Values | |
KaiXian KX-5640 | |
KX-5640 front | |
General Info | |
Designer | Zhaoxin |
Manufacturer | HLMC |
Model Number | KX-5640 |
Part Number | KX-5640 |
Market | Desktop, Mobile, Embedded |
Introduction | December 28, 2017 (announced) December 28, 2017 (launched) |
General Specs | |
Family | KaiXian |
Series | KX-5000 |
Frequency | 2,000 MHz |
Bus type | PCIe 3.0 |
Bus rate | 4 × 8 GT/s |
Clock multiplier | 20 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | WuDaoKou |
Process | 28 nm |
Transistors | 2,100,000,000 |
Technology | CMOS |
Die | 187 mm² |
Word Size | 64 bit |
Cores | 4 |
Threads | 4 |
Max Memory | 64 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Tjunction | 0 °C – 90 °C |
KaiXian KX-5640 is a 64-bit quad-core x86 microprocessor designed by Zhaoxin and introduced in late 2017 specifically for the Chinese market. This processor is fabricated on a 28 nm process based on the WuDaoKou microarchitecture. The KX-5640 operates at 2 GHz with a TDP of ? W and supports up to 64 GiB of dual-channel DDR4-2133 memory. The KX-5640 also incorporates an integrated graphics processor.
Cache[edit]
- Main article: WuDaoKou § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options |
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Graphics[edit]
Integrated Graphics Information
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Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Facts about "KaiXian KX-5640 - Zhaoxin"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | KaiXian KX-5640 - Zhaoxin#pcie + |
base frequency | 2,000 MHz (2 GHz, 2,000,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | PCIe 3.0 + |
clock multiplier | 20 + |
core count | 4 + |
designer | Zhaoxin + |
die area | 187 mm² (0.29 in², 1.87 cm², 187,000,000 µm²) + |
family | KaiXian + |
first announced | December 28, 2017 + |
first launched | December 28, 2017 + |
full page name | zhaoxin/kaixian/kx-5640 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Trusted Execution Technology +, Intel VT-x + and Extended Page Tables + |
has intel trusted execution technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | ? + |
integrated gpu designer | Zhaoxin + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 32-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
ldate | December 28, 2017 + |
main image | + |
main image caption | KX-5640 front + |
manufacturer | HLMC + |
market segment | Desktop +, Mobile + and Embedded + |
max cpu count | 1 + |
max junction temperature | 363.15 K (90 °C, 194 °F, 653.67 °R) + |
max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) + |
max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 2 + |
microarchitecture | WuDaoKou + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | KX-5640 + |
name | KaiXian KX-5640 + |
part number | KX-5640 + |
process | 28 nm (0.028 μm, 2.8e-5 mm) + |
series | KX-5000 + |
smp max ways | 1 + |
supported memory type | DDR4-2133 + |
technology | CMOS + |
thread count | 4 + |
transistor count | 2,100,000,000 + |
word size | 64 bit (8 octets, 16 nibbles) + |