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Difference between revisions of "intel/xeon w/w-2104"
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{{intel title|Xeon W-2104}} | {{intel title|Xeon W-2104}} | ||
| − | {{ | + | {{chip |
|future=Yes | |future=Yes | ||
|name=Xeon W-2104 | |name=Xeon W-2104 | ||
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|part number=CD8067303532903 | |part number=CD8067303532903 | ||
|s-spec=SR3LH | |s-spec=SR3LH | ||
| + | |s-spec qs=QMW1 | ||
|market=Workstation | |market=Workstation | ||
|first announced=August 29, 2017 | |first announced=August 29, 2017 | ||
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|isa family=x86 | |isa family=x86 | ||
|microarch=Skylake (server) | |microarch=Skylake (server) | ||
| − | |platform= | + | |platform=Basin Falls |
|core name=Skylake W | |core name=Skylake W | ||
|core family=6 | |core family=6 | ||
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|max memory=512 GiB | |max memory=512 GiB | ||
|tdp=120 W | |tdp=120 W | ||
| − | |package | + | |tcase min=0 °C |
| + | |tcase max=66 °C | ||
| + | |package name 1=intel,fclga_2066 | ||
}} | }} | ||
'''W-2104''' is a {{arch|64}} [[quad-core]] [[x86]] enterprise performance workstation microprocessor introduced by [[Intel]] in [[2017]]. This processors, which is fabricated on an enhanced [[14 nm process|14nm+ process]] based on the {{intel|Skylake (server)|Skylake}} server microarchitecture, operates at 3.2 GHz with a [[TDP]] of 120 W and no {{intel|turbo boost}}. This chip supports up to 512 GiB of quad-channel DDR4-2400 ECC memory. | '''W-2104''' is a {{arch|64}} [[quad-core]] [[x86]] enterprise performance workstation microprocessor introduced by [[Intel]] in [[2017]]. This processors, which is fabricated on an enhanced [[14 nm process|14nm+ process]] based on the {{intel|Skylake (server)|Skylake}} server microarchitecture, operates at 3.2 GHz with a [[TDP]] of 120 W and no {{intel|turbo boost}}. This chip supports up to 512 GiB of quad-channel DDR4-2400 ECC memory. | ||
Latest revision as of 09:34, 24 October 2018
| Edit Values | |
| Xeon W-2104 | |
 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | W-2104 |
| Part Number | CD8067303532903 |
| S-Spec | SR3LH QMW1 (QS) |
| Market | Workstation |
| Introduction | August 29, 2017 (announced) August 29, 2017 (launched) |
| Release Price | $255.00 |
| Shop | Amazon |
| General Specs | |
| Family | Xeon W |
| Series | W-2000 |
| Locked | Yes |
| Frequency | 3,200 MHz |
| Bus type | DMI 3.0 |
| Bus rate | 4 × 8 GT/s |
| Clock multiplier | 32 |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Skylake (server) |
| Platform | Basin Falls |
| Core Name | Skylake W |
| Core Family | 6 |
| Core Stepping | U0 |
| Process | 14 nm |
| Technology | CMOS |
| Word Size | 64 bit |
| Cores | 4 |
| Threads | 4 |
| Max Memory | 512 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| TDP | 120 W |
| Tcase | 0 °C – 66 °C |
| Packaging | |
| Package | FCLGA-2066 (LGA) |
| Dimension | 52.5 mm × 45 mm |
| Pitch | 1.016 mm |
| Contacts | 2066 |
| Socket | Socket R4 |
W-2104 is a 64-bit quad-core x86 enterprise performance workstation microprocessor introduced by Intel in 2017. This processors, which is fabricated on an enhanced 14nm+ process based on the Skylake server microarchitecture, operates at 3.2 GHz with a TDP of 120 W and no turbo boost. This chip supports up to 512 GiB of quad-channel DDR4-2400 ECC memory.
Contents
Cache[edit]
- Main article: Skylake § Cache
Note that while this is a quad-core part, the L3 cache size is that of a hexa-core part.
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
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Expansion Options |
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Features[edit]
[Edit/Modify Supported Features]
Facts about "Xeon W-2104 - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon W-2104 - Intel#pcie + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has advanced vector extensions 512 | true + |
| has ecc memory support | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Secure Key Technology +, OS Guard + and Identity Protection Technology + |
| has intel enhanced speedstep technology | true + |
| has intel identity protection technology support | true + |
| has intel secure key technology | true + |
| has intel speed shift technology | true + |
| has intel supervisor mode execution protection | true + |
| has intel trusted execution technology | true + |
| has intel vpro technology | true + |
| has intel vt-d technology | true + |
| has intel vt-x technology | true + |
| has second level address translation support | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l2$ description | 16-way set associative + |
| l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
| l3$ description | 11-way set associative + |
| l3$ size | 8.25 MiB (8,448 KiB, 8,650,752 B, 0.00806 GiB) + |
| max memory bandwidth | 71.53 GiB/s (73,246.72 MiB/s, 76.805 GB/s, 76,804.753 MB/s, 0.0699 TiB/s, 0.0768 TB/s) + |
| max memory channels | 4 + |
| number of avx-512 execution units | 1 + |
| supported memory type | DDR4-2400 + |
| x86/has memory protection extensions | true + |