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{{vti title|VL86C020}} | {{vti title|VL86C020}} | ||
− | {{ | + | {{chip |
|name=VL86C020 | |name=VL86C020 | ||
|no image=No | |no image=No | ||
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|part number 4=VY86C020-20GC | |part number 4=VY86C020-20GC | ||
|part number 5=VY86C020-25FC | |part number 5=VY86C020-25FC | ||
+ | |part number 6=VY86C020-35PSGC | ||
|market=Embedded | |market=Embedded | ||
|market 2=Desktop | |market 2=Desktop | ||
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|frequency=20 MHz | |frequency=20 MHz | ||
|frequency 2=25 MHz | |frequency 2=25 MHz | ||
+ | |frequency 3=33 MHz | ||
+ | |frequency 4=36 MHz | ||
|isa=ARMv2a | |isa=ARMv2a | ||
|isa family=ARM | |isa family=ARM | ||
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|core count=1 | |core count=1 | ||
|thread count=1 | |thread count=1 | ||
− | |||
|max memory=64 MiB | |max memory=64 MiB | ||
|max memory addr=0x3FFFFFF | |max memory addr=0x3FFFFFF | ||
+ | |max cpus=1 | ||
|power=2 W | |power=2 W | ||
|v core=5 | |v core=5 | ||
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|package module 2={{packages/vti/pga-144}} | |package module 2={{packages/vti/pga-144}} | ||
}} | }} | ||
− | '''VL86C020''' is a {{arch|32}} [[ARM]] microprocessor designed by [[Acorn]] and introduce by [[vti|VTI]] in [[1989]]. This processor is based on the {{acorn|ARM3|l=arch}} microarchitecture and was Acorn's second commercial ARM processor. This chip was manufactured on [[VLSI Technology|VLSI]]'s [[1.5 µm process]] and | + | '''VL86C020''' is a {{arch|32}} [[ARM]] microprocessor designed by [[Acorn]] and introduce by [[vti|VTI]] in [[1989]]. This processor is based on the {{acorn|ARM3|l=arch}} microarchitecture and was Acorn's second commercial ARM processor. This chip was manufactured on [[VLSI Technology|VLSI]]'s [[1.5 µm process]] and supplied as a 20, 25, 33, or 35 MHz part. |
This processor operates performs at over three times the performance of its {{\\|VL86C010|predecessor}} thanks to its higher clock speed and on-die cache. | This processor operates performs at over three times the performance of its {{\\|VL86C010|predecessor}} thanks to its higher clock speed and on-die cache. | ||
+ | |||
+ | == Cache == | ||
+ | {{main|acorn/microarchitectures/arm3#Memory_Hierarchy|l1=ARM3 § Cache}} | ||
+ | {{cache size | ||
+ | |l1 cache=4 KiB | ||
+ | |l1 break=1x4 KiB | ||
+ | |l1 desc=64-way set associative | ||
+ | |l1 policy=write-through | ||
+ | }} | ||
== Second source == | == Second source == | ||
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<small>'''Note:''' The A500 predates the actual chip introduction because it was never commercially sold.</small> | <small>'''Note:''' The A500 predates the actual chip introduction because it was never commercially sold.</small> | ||
+ | |||
+ | == Datasheet == | ||
+ | * [[:File:VL86C020 DS.pdf|VL86C020 Datasheet]], 1990 |
Latest revision as of 00:21, 7 November 2021
Edit Values | |||||||||
VL86C020 | |||||||||
General Info | |||||||||
Designer | Acorn Computers | ||||||||
Manufacturer | VLSI Technology, Sanyo | ||||||||
Model Number | VL86C020 | ||||||||
Part Number | VL86C020-20FC, VL86C020-20GC, VY86C020-20FC, VY86C020-20GC, VY86C020-25FC, VY86C020-35PSGC | ||||||||
Market | Embedded, Desktop | ||||||||
Introduction | 1989 (launched) | ||||||||
General Specs | |||||||||
Family | VL86Cx | ||||||||
Frequency | 20 MHz, 25 MHz, 33 MHz, 36 MHz | ||||||||
Microarchitecture | |||||||||
ISA | ARMv2a (ARM) | ||||||||
Microarchitecture | ARM3 | ||||||||
Chipset | MEMC, VIDC, IOC | ||||||||
Process | 1.5 µm | ||||||||
Transistors | 309,656 | ||||||||
Technology | CMOS | ||||||||
Die | 86.764 mm² 8.72 mm × 9.95 mm | ||||||||
Word Size | 32 bit | ||||||||
Cores | 1 | ||||||||
Threads | 1 | ||||||||
Max Memory | 64 MiB | ||||||||
Max Address Mem | 0x3FFFFFF | ||||||||
Multiprocessing | |||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||
Electrical | |||||||||
Power dissipation | 2 W | ||||||||
Vcore | 5 ± 5 % | ||||||||
Tstorage | -65 °C – -150 °C | ||||||||
Tambient | -10 °C – 80 °C | ||||||||
Packaging | |||||||||
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VL86C020 is a 32-bit ARM microprocessor designed by Acorn and introduce by VTI in 1989. This processor is based on the ARM3 microarchitecture and was Acorn's second commercial ARM processor. This chip was manufactured on VLSI's 1.5 µm process and supplied as a 20, 25, 33, or 35 MHz part.
This processor operates performs at over three times the performance of its predecessor thanks to its higher clock speed and on-die cache.
Contents
Cache[edit]
- Main article: ARM3 § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Second source[edit]
This microprocessor was second-sourced by Sanyo.
Systems[edit]
- Acorn Archimedes A500, 1987
- Acorn Archimedes A540, 1990
- Acorn R225, 1990
- Acorn R260, 1990
- Acorn Archimedes A5000, 1991
- Acorn A4, 1992
- Acorn Archimedes A5000 (Alpha), 1993
Note: The A500 predates the actual chip introduction because it was never commercially sold.
Datasheet[edit]
- VL86C020 Datasheet, 1990