Latest revision as of 15:31, 13 December 2017

Edit Values
Godson-2E
Godson-2E chip
General Info
Designer	Loongson
Manufacturer	STMicroelectronics
Model Number	2E
Part Number	CZ70
Market	Desktop
Introduction	2006 (announced) March 18, 2006 (launched)
General Specs
Family	Godson 2
Series	Godson 2
Frequency	1,000 MHz
Bus type	SysAD
Microarchitecture
ISA	MIPS64 (MIPS)
Microarchitecture	GS464
Core Name	GS464
Process	90 nm
Transistors	47,000,000
Technology	CMOS
Die	36 mm²
Word Size	64 bit
Cores	1
Threads	1
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Electrical
Power dissipation	7 W
Vcore	1.2 V

Godson-2E (龙芯2E) is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. Introduced in early 2006, the Godson-2E operates at up to 1 GHz consuming 7W. This chip was manufactured on STMicroelectronics' 90 nm process and provides roughly three times the performance of 2C. This processor is known as China's first processor to reach gigahertz frequency.

The Godson-2E introduces a number of improvements over its predecessor, including double the clock frequency, the addition of a large L2 cache, and the integration of the northbridge on-die, supporting up to DDR-333.

Cache[edit]

Main article: GS464 § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 128 KiB 131,072 B 0.125 MiB L1I$ 64 KiB 65,536 B 0.0625 MiB 1x64 KiB 4-way set associative   L1D$ 64 KiB 65,536 B 0.0625 MiB 1x64 KiB 4-way set associative   L2$ 512 KiB 0.5 MiB 524,288 B 4.882812e-4 GiB     1x512 KiB 4-way set associative

Memory controller[edit]

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR-333 Supports ECC Yes Max Mem 2 GiB Controllers 1 Channels 1 Max Bandwidth 4.967 GiB/s 5,086.208 MiB/s 5.333 GB/s 5,333.276 MB/s 0.00485 TiB/s 0.00533 TB/s Bandwidth Single 4.967 GiB/s

Graphics[edit]

This chip had no integrated graphics processing unit.

Die Shot[edit]

• 90 nm process
• 47,000,000 transistors
• 36 mm²

References[edit]

• Hu, Wei-Wu, and Jian Wang. "Making effective decisions in computer architects’ real-world: Lessons and experiences with Godson-2 processor designs." Journal of Computer Science and Technology 23.4 (2008): 620-632.