From WikiChip
Difference between revisions of "loongson/godson 2/2f"
< loongson‎ | godson 2

m (Bot: moving all {{mpu}} to {{chip}})
 
(10 intermediate revisions by 2 users not shown)
Line 1: Line 1:
 
{{loongson title|Godson-2F}}
 
{{loongson title|Godson-2F}}
−
{{mpu
+
{{chip
 
| name                = Godson-2F
 
| name                = Godson-2F
 
| image              = godson-2f.jpg
 
| image              = godson-2f.jpg
Line 9: Line 9:
 
| model number        = 2F
 
| model number        = 2F
 
| part number        = PLA80
 
| part number        = PLA80
−
| part number 1       =  
+
| part number 2       =  
 
| market              = Desktop
 
| market              = Desktop
 
| first announced    = July 31, 2007
 
| first announced    = July 31, 2007
Line 39: Line 39:
 
| core stepping      =  
 
| core stepping      =  
 
| process            = 90 nm
 
| process            = 90 nm
−
| transistors        =  
+
| transistors        = 51,000,000
 
| technology          = CMOS
 
| technology          = CMOS
−
| die area            =  
+
| die area            = 43 mm²
 
| die width          =  
 
| die width          =  
 
| die length          =  
 
| die length          =  
Line 50: Line 50:
 
| max memory          =  
 
| max memory          =  
  
−
| electrical          = Yes
+
 
 
| power              = 5 W
 
| power              = 5 W
−
| v core              =  
+
| v core              = 1.2 V
−
| v core tolerance    = <!-- OR ... -->
 
−
| v core min          =
 
−
| v core max          =
 
 
| v io                =  
 
| v io                =  
 
| v io tolerance      =  
 
| v io tolerance      =  
Line 78: Line 75:
 
| tambient max        =  
 
| tambient max        =  
  
−
| packaging          = <!-- put Yes if packaging info is added -->
+
| packaging          = Yes
−
| package 0          =  
+
| package 0          = HFCBGA-452
−
| package 0 type      =  
+
| package 0 type      = HFCBGA
−
| package 0 pins      =  
+
| package 0 pins      = 452
 
| package 0 pitch    =  
 
| package 0 pitch    =  
−
| package 0 width    =  
+
| package 0 width    = 27 mm
−
| package 0 length    =  
+
| package 0 length    = 27 mm
 
| package 0 height    =  
 
| package 0 height    =  
−
| socket 0            =  
+
| socket 0            = BGA-452
−
| socket 0 type      =  
+
| socket 0 type      = BGA
 
}}
 
}}
 
'''Godson-2F''' ('''龙芯2F''') is a {{arch|64}} [[MIPS]] performance processor developed by [[Institute of Computing Technology of the Chinese Academy of Sciences|ICT]] and later [[Loongson]] for desktop computers. Introduced in mid-[[2008]], the Godson-2F operates at up to 800 MHz consuming 5 W. This chip was manufactured on [[STMicroelectronics]]' [[90 nm process]].
 
'''Godson-2F''' ('''龙芯2F''') is a {{arch|64}} [[MIPS]] performance processor developed by [[Institute of Computing Technology of the Chinese Academy of Sciences|ICT]] and later [[Loongson]] for desktop computers. Introduced in mid-[[2008]], the Godson-2F operates at up to 800 MHz consuming 5 W. This chip was manufactured on [[STMicroelectronics]]' [[90 nm process]].
 +
 +
The Godson-2F features a faster memory controller (supporting up to DDR2-667) and integrates some of the functionality of the [[southbridge]] including a PCI-X controller and more general-purpose I/O pins.
 +
 +
== Cache ==
 +
{{main|loongson/microarchitectures/GS464#Memory_Hierarchy|l1=GS464 § Cache}}
 +
{{cache size
 +
|l1 cache=128 KiB
 +
|l1i cache=64 KiB
 +
|l1i break=1x64 KiB
 +
|l1i desc=4-way set associative
 +
|l1d cache=64 KiB
 +
|l1d break=1x64 KiB
 +
|l1d desc=4-way set associative
 +
|l1d policy=
 +
|l2 cache=512 KiB
 +
|l2 break=1x512 KiB
 +
|l2 desc=4-way set associative
 +
|l2 policy=
 +
}}
 +
 +
== Memory controller ==
 +
{{memory controller
 +
|type=DDR2-667
 +
|ecc=Yes
 +
|max mem=4 GiB
 +
|controllers=1
 +
|channels=1
 +
|max bandwidth=9.934 GiB/s
 +
|bandwidth schan=9.934 GiB/s
 +
}}
 +
 +
== Expansions ==
 +
This chip has integrated [[HyperTransport]] 1.0 operating at 400 MHz.
 +
{{expansions
 +
|pci width  = 32 bit
 +
|pci clock = 66 MHz
 +
|pci revision=2.3
 +
|pcix width = 32 bit
 +
|pcix revision=1.0b
 +
|pcix clock = 133 MHz
 +
|lpc revision=1.1
 +
}}
 +
 +
== Graphics ==
 +
This chip had no [[integrated graphics processing unit]].
 +
 +
== Die Shot ==
 +
* [[90 nm process]]
 +
* 51,000,000 transistors
 +
* 43 mm² die size
 +
[[File:godson-2f die shot.png]]
 +
 +
== Datasheet ==
 +
* [[:File:godson 2f ds (v1.1).pdf|Godson 2F Datasheet (V1.1)]]
 +
 +
== References ==
 +
* Hu, Wei-Wu, and Jian Wang. "Making effective decisions in computer architects’ real-world: Lessons and experiences with Godson-2 processor designs." Journal of Computer Science and Technology 23.4 (2008): 620-632.

Latest revision as of 15:31, 13 December 2017

Edit Values
Godson-2F
godson-2f.jpg
Godson-2F chip
General Info
DesignerLoongson
ManufacturerSTMicroelectronics
Model Number2F
Part NumberPLA80
MarketDesktop
IntroductionJuly 31, 2007 (announced)
June, 2008 (launched)
General Specs
FamilyGodson 2
SeriesGodson 2
Frequency800 MHz
Microarchitecture
ISAMIPS64 (MIPS)
MicroarchitectureGS464
Core NameGS464
Process90 nm
Transistors51,000,000
TechnologyCMOS
Die43 mm²
Word Size64 bit
Cores1
Threads1
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power dissipation5 W
Vcore1.2 V

Godson-2F (龙芯2F) is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. Introduced in mid-2008, the Godson-2F operates at up to 800 MHz consuming 5 W. This chip was manufactured on STMicroelectronics' 90 nm process.

The Godson-2F features a faster memory controller (supporting up to DDR2-667) and integrates some of the functionality of the southbridge including a PCI-X controller and more general-purpose I/O pins.

Cache[edit]

Main article: GS464 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
1x64 KiB4-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
1x64 KiB4-way set associative 
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  1x512 KiB4-way set associative 

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR2-667
Supports ECCYes
Max Mem4 GiB
Controllers1
Channels1
Max Bandwidth9.934 GiB/s
10,172.416 MiB/s
10.667 GB/s
10,666.551 MB/s
0.0097 TiB/s
0.0107 TB/s
Bandwidth
Single 9.934 GiB/s

Expansions[edit]

This chip has integrated HyperTransport 1.0 operating at 400 MHz.

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCI
Revision2.3
Width32 bit
Clock66 MHz
PCI-X
Revision1.0b
Width32 bit
Clock133 MHz
LPC
Revision1.1


Graphics[edit]

This chip had no integrated graphics processing unit.

Die Shot[edit]

godson-2f die shot.png

Datasheet[edit]

References[edit]

  • Hu, Wei-Wu, and Jian Wang. "Making effective decisions in computer architects’ real-world: Lessons and experiences with Godson-2 processor designs." Journal of Computer Science and Technology 23.4 (2008): 620-632.
Retrieved from "https://en.wikichip.org/w/index.php?title=loongson/godson_2/2f&oldid=71129"
Facts about "Godson-2F - Loongson"
RDF feed
base frequency800 MHz (0.8 GHz, 800,000 kHz) +
core count1 +
core nameGS464 +
core voltage1.2 V (12 dV, 120 cV, 1,200 mV) +
designerLoongson +
die area43 mm² (0.0667 in², 0.43 cm², 43,000,000 µm²) +
familyGodson 2 +
first announcedJuly 31, 2007 +
first launchedJune 2008 +
full page nameloongson/godson 2/2f +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaMIPS64 +
isa familyMIPS +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description4-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description4-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
ldateJune 2008 +
main imageFile:godson-2f.jpg +
main image captionGodson-2F chip +
manufacturerSTMicroelectronics +
market segmentDesktop +
max cpu count1 +
max memory bandwidth9.934 GiB/s (10,172.416 MiB/s, 10.667 GB/s, 10,666.551 MB/s, 0.0097 TiB/s, 0.0107 TB/s) +
max memory channels1 +
microarchitectureGS464 +
model number2F +
nameGodson-2F +
part numberPLA80 +
power dissipation5 W (5,000 mW, 0.00671 hp, 0.005 kW) +
process90 nm (0.09 μm, 9.0e-5 mm) +
seriesGodson 2 +
smp max ways1 +
supported memory typeDDR2-667 +
technologyCMOS +
thread count1 +
transistor count51,000,000 +
word size64 bit (8 octets, 16 nibbles) +