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Latest revision as of 22:31, 23 March 2020
Surge | |
Developer | Xiaomi |
Manufacturer | TSMC |
Type | System on chips |
Introduction | February 28, 2017 (announced) |
Architecture | Performance ARM SoC |
ISA | ARMv8 |
µarch | Cortex-A53, Cortex-A73 |
Word size | 64 bit 8 octets
16 nibbles |
Process | 28 nm 0.028 μm , 10 nm2.8e-5 mm 0.01 μm
1.0e-5 mm |
Technology | CMOS |
Clock | 1,400 MHz-2,200 MHz |
Surge is a family of 64-bit performance ARM system-on-chips designed by Xiaomi and launched in 2017. Development for the custom chips was done by Xiaomi's subsidiary Pinecone. Surge processors are set to be used in a number of Xiaomi's own smartphones.
History[edit]
Xiaomi was founded in April of 2010 and has been using other ARM processors for their mobile from various vendors such as Qualcomm and Nvidia. In 2014 Xiaomi established Pinecone, a new subsidiary for the sole purpose of designing their own chips in-house to allow for higher integration in their devices. In February of 2017 Xiaomi announced their first chip in their Surge family, the S1 with a flagship S2 model to be introduced in the fourth quarter of 2017.
Members[edit]
List of Xiaomi Surge Processors | |||||||||
---|---|---|---|---|---|---|---|---|---|
Main processor | IGP | ||||||||
Model | Launched | Process | Cores | C | T | Freq | Name | Freq | |
S1 | 28 nm 0.028 μm 2.8e-5 mm | Cortex-A53 | 8 | 8 | 1.4 GHz 1,400 MHz 2.2 GHz1,400,000 kHz 2,200 MHz 2,200,000 kHz | Mali-T860 | 800 MHz 0.8 GHz 800,000 KHz | ||
S2 | 10 nm 0.01 μm 1.0e-5 mm | Cortex-A53 Cortex-A73 | 8 | 8 | Mali-G71 | 900 MHz 0.9 GHz 900,000 KHz | |||
Count: 2 |
See also[edit]
- Apple Ax
- Samsung Exynos
- Qualcomm Snapdragon
- Intel Atom
Facts about "Surge - Xiaomi"
designer | Xiaomi + |
first announced | February 21, 2017 + |
first launched | February 28, 2017 + |
full page name | xiaomi/surge + |
instance of | system on a chip family + |
instruction set architecture | ARMv8 + |
main designer | Xiaomi + |
manufacturer | TSMC + |
microarchitecture | Cortex-A53 + and Cortex-A73 + |
name | Pinecone + |
process | 28 nm (0.028 μm, 2.8e-5 mm) + and 10 nm (0.01 μm, 1.0e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |