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(add tables)
(K8 Family)
 
(One intermediate revision by the same user not shown)
Line 85: Line 85:
 
! Clock rate <br>(MHz)
 
! Clock rate <br>(MHz)
 
|-
 
|-
! rowspan=77 | {{amd|K8|l=arch}}<br>(x86-64)<br>(AMD64)
+
! rowspan=61 | {{amd|K8|l=arch}}<br>(x86-64)<br>(AMD64)
| rowspan=3 | [[130 nm]]
+
| [[130 nm]]
| rowspan=12 | [[Opteron]]
+
| rowspan=10 | [[Opteron]]
 
| 2003
 
| 2003
| rowspan=3 | Sledgehammer
+
| Sledgehammer
| 100
+
| 100, 200, 800
| rowspan="6" | 1
+
| rowspan="4" | 1
| rowspan=3 | 1400–2400
+
| 1400–2400
|-
 
|
 
| 200
 
|-
 
|
 
| 800
 
 
|-
 
|-
 
| rowspan="9" | [[90 nm]]
 
| rowspan="9" | [[90 nm]]
|
+
| 2004
 
| Venus
 
| Venus
 
| 100
 
| 100
 
| rowspan=3 | 1600–3000
 
| rowspan=3 | 1600–3000
 
|-
 
|-
|
+
| 2004
 
| Troy
 
| Troy
 
| 200
 
| 200
 
|-
 
|-
|
+
| 2004
 
| Athens
 
| Athens
 
| 800
 
| 800
 
|-
 
|-
|
+
| 2005
 
| Denmark
 
| Denmark
 
| 100
 
| 100
Line 120: Line 114:
 
| 1600–3200
 
| 1600–3200
 
|-
 
|-
|
+
| 2005
 
| Italy
 
| Italy
 
| 200
 
| 200
 
| 1600–3200
 
| 1600–3200
 
|-
 
|-
|
+
| 2005
 
| Egypt
 
| Egypt
 
| 800
 
| 800
 
| 1600–3200
 
| 1600–3200
 
|-
 
|-
|
+
| 2006
 
| Santa Ana
 
| Santa Ana
 
| 1200
 
| 1200
 
| 1800–3200
 
| 1800–3200
 
|-
 
|-
|
+
| 2006
 
| rowspan=2 | Santa Rosa
 
| rowspan=2 | Santa Rosa
 
| 2200
 
| 2200
 
| 1800–3200
 
| 1800–3200
 
|-
 
|-
|
+
| 2006
 
| 8200
 
| 8200
 
| 2000–3000
 
| 2000–3000
Line 183: Line 177:
 
| Clawhammer
 
| Clawhammer
 
|
 
|
| rowspan=7 | 1
+
| rowspan=11 | 1
 
| 2000–2600
 
| 2000–2600
 
|-
 
|-
Line 218: Line 212:
 
| 2000–2800
 
| 2000–2800
 
|-
 
|-
| rowspan=7 | [[90 nm]]
+
| rowspan=2 | [[130 nm]]
| rowspan=8 | {{amd|Athlon 64 X2}}
+
| rowspan=4 | {{amd|Mobile Athlon 64}}
 +
| 2003
 +
| Clawhammer
 +
| 2700+, 2800+, 3000+, <br>3200+, 3400+, 3700+
 +
| 1600, 1600, 1800, <br>2000, 2200, 2400
 +
|-
 +
|
 +
| Odessa
 +
| 2700+, 2800+, 3000+
 +
| 1600, 1800, 2000
 +
|-
 +
| rowspan=2 | [[90 nm]]
 +
|
 +
| Oakville
 +
| 2700+, 2800+, 3000+
 +
| 1600, 1800, 2000
 +
|-
 
|
 
|
 +
| Newark
 +
| 3000+, 3200+, 3400+, <br>3700+, 4000+
 +
| 1800, 2000, 2200, <br>2400, 2600
 +
|-
 +
| rowspan=6 | [[90 nm]]
 +
| rowspan=7 | {{amd|Athlon 64 X2}}
 +
| 2005
 
| rowspan=2 | Manchester
 
| rowspan=2 | Manchester
 
| 3600+
 
| 3600+
| rowspan=8 | 2
+
| rowspan=7 | 2
 
| 2000
 
| 2000
 
|-
 
|-
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|-
 
|-
 
|
 
|
| rowspan=3 | Windsor
+
| rowspan=2 | Windsor
| 3600+
+
| 3600+, 3800+, 4200+, <br>4600+, 5000+, 5400+
| 2000
+
| 2000, 2000, 2200, <br>2400, 2600, 2800
 
|-
 
|-
 
|
 
|
| 3800+, 4200+, 4600+, <br>5000+, 5400+
+
| 4000+, 4400+, 4800+, <br>5200+, 5600+, 6000+, 6400+
| 2000, 2200, 2400, <br>2600, 2800
+
| 2000, 2200, 2400, <br>2600, 2800, 3000, 3200
|-
 
|
 
| 4000+, 4400+, 4800+, <br>5200+, 5600+, <br>6000+, 6400+
 
| 2000, 2200, 2400, <br>2600, 2800, <br>3000, 3200
 
 
|-
 
|-
 
| [[65 nm]]
 
| [[65 nm]]
Line 256: Line 269:
 
| Brisbane
 
| Brisbane
 
| 3600+, 3800+, 4000+, <br>4200+, 4400+, 4600+, <br>4800+, 5000+, 5200+, <br>5400+, 5600+, 5800+, 6000+
 
| 3600+, 3800+, 4000+, <br>4200+, 4400+, 4600+, <br>4800+, 5000+, 5200+, <br>5400+, 5600+, 5800+, 6000+
| 1900, 2000, 2100, 2200, <br>2300, 2400, 2500, 2600, <br>2700, 2800, 2900, <br>3000, 3100
+
| 1900, 2000, 2100, <br>2200, 2300, 2400, <br>2500, 2600, 2700, <br>2800, 2900, 3000, 3100
 
|-
 
|-
| rowspan=2 | [[130 nm]]
+
| [[130 nm]]
| rowspan=17 | {{amd|Sempron}}
+
| rowspan=11 | {{amd|Sempron}}
|
+
| 2004
| rowspan=2 | Paris
+
| Paris
| 3000+
+
| 3000+, 3100+
| rowspan="37" | 1
+
| rowspan="11" | 1
| 1800
 
|-
 
|
 
| 3100+
 
 
| 1800
 
| 1800
 
|-
 
|-
| rowspan="13" | [[90 nm]]
+
| rowspan="8" | [[90 nm]]
|
+
| 2004
| rowspan=11 | Palermo
+
| rowspan=6 | Palermo
 
| 2500+
 
| 2500+
 
| 1400
 
| 1400
 
|-
 
|-
 
|
 
|
| 2600+
+
| 2600+, 2800+
| rowspan=2 | 1600
+
| 1600
 
|-
 
|-
 
|
 
|
| 2800+
+
| 3000+, 3100+
 +
| 1800
 
|-
 
|-
|
+
| 2005
| 3000+
+
| 3300+, 3400+
| rowspan=2 | 1800
+
| 2000
 
|-
 
|-
 
|
 
|
| 3100+
+
| 3000+, 3200+
 +
| 1800
 
|-
 
|-
 
|
 
|
| 3300+
+
| 3400+, 3500+
| rowspan=2 | 2000
+
| 2000
 
|-
 
|-
|
+
| 2006
| 3400+
 
|-
 
|
 
| 3000+
 
| rowspan=2 | 1800
 
|-
 
|
 
| 3200+
 
|-
 
|
 
| 3400+
 
| rowspan=2 | 2000
 
|-
 
|
 
| 3500+
 
|-
 
|
 
 
| rowspan=2 | Manila
 
| rowspan=2 | Manila
 
| 2800+, 3200+, 3500+
 
| 2800+, 3200+, 3500+
 
| 1600, 1800, 2000
 
| 1600, 1800, 2000
 
|-
 
|-
|
+
| 2006
 
| 3000+, 3400+, 3600+, 3800+
 
| 3000+, 3400+, 3600+, 3800+
 
| 1600, 1800, 2000, 2200
 
| 1600, 1800, 2000, 2200
 
|-
 
|-
 
| rowspan=2 | [[65 nm]]
 
| rowspan=2 | [[65 nm]]
|
+
| 2007
 
| rowspan=2 | Sparta
 
| rowspan=2 | Sparta
 
| LE-1100, LE-1150
 
| LE-1100, LE-1150
 
| 1900, 2000
 
| 1900, 2000
 
|-
 
|-
|
+
| 2007
 
| LE-1200, LE-1250, LE-1300
 
| LE-1200, LE-1250, LE-1300
 
| 2100, 2200, 2300
 
| 2100, 2200, 2300
 
|-
 
|-
| rowspan=3 | [[130 nm]]
+
| rowspan=1 | [[130 nm]]
| rowspan=5 | {{amd|Mobile Athlon 64}}
+
| rowspan=6 | Mobile {{amd|Sempron}}
| 2003
+
| 2004
| rowspan=2 | Clawhammer
+
| Dublin <!-- Socket 754 -->
| 2700+
+
| 2600+ ÷ 3000+
| 1600
+
| rowspan="6" | 1
|-
 
|
 
| 2800+, 3000+, 3200+, <br>3400+, 3700+
 
| 1600, 1800, 2000, <br>2200, 2400
 
|-
 
|
 
| Odessa
 
| 2700+, 2800+, 3000+
 
| 1600, 1800, 2000
 
|-
 
| rowspan=2 | [[90 nm]]
 
|
 
| Oakville
 
| 2700+, 2800+, 3000+
 
| 1600, 1800, 2000
 
|-
 
|
 
| Newark
 
| 3000+, 3200+, 3400+, <br>3700+, 4000+
 
| 1800, 2000, 2200, <br>2400, 2600
 
|-
 
| rowspan=2 | [[130 nm]]
 
| rowspan=12 | Mobile {{amd|Sempron}}
 
|
 
| rowspan=2 | Dublin
 
|
 
 
| 1600, 1800
 
| 1600, 1800
 
|-
 
|-
|
+
| rowspan="5" | [[90 nm]]
|
+
| 2005 <!-- 130 nm ? -->
| 1600
+
| Georgetown <!-- Socket 754 -->
|-
+
| 2600+ ÷ 3300+
| rowspan="15" | [[90 nm]]
 
|
 
| rowspan=2 | Georgetown
 
|
 
 
| 1600, 1800, 2000
 
| 1600, 1800, 2000
 
|-
 
|-
|
+
| 2004
|
+
| Sonora <!-- Socket 754 -->
 +
| 2600+ ÷ 3100+
 
| 1600, 1800
 
| 1600, 1800
 
|-
 
|-
|
+
| 2005
| rowspan=2 | Sonora
+
| Albany <!-- Socket 754 -->
|
+
| 3000+ ÷ 3600+
| 1600, 1800
 
|-
 
|
 
|
 
| 1600, 1800
 
|-
 
|
 
| rowspan=2 | Albany
 
|
 
 
| 1800, 2000, 2200
 
| 1800, 2000, 2200
 
|-
 
|-
|
+
| 2005
|
+
| Roma <!-- Socket 754 -->
| 1800, 2000
+
| 2800+ ÷ 3400+
|-
 
|
 
| rowspan=2 | Roma
 
|
 
| 1800, 2000
 
|-
 
|
 
|
 
 
| 1600, 1800, 2000
 
| 1600, 1800, 2000
 
|-
 
|-
|
+
| 2006
| rowspan=2 | Keene
+
| Keene <!-- Socket S1 (638) -->
|
+
| 3200+ ÷ 3600+
| 1800, 2000
 
|-
 
|
 
|
 
 
| 1600, 1800, 2000
 
| 1600, 1800, 2000
 
|-
 
|-
| rowspan=3 | {{amd|Turion 64}}
+
| rowspan="5" | [[90 nm]]
 +
| rowspan=3 | {{amd|Turion 64}}<br>([[Turion]])
 
| 2005
 
| 2005
 
| rowspan=2 | Lancaster
 
| rowspan=2 | Lancaster
 
| MT-28, MT-32, ML-42
 
| MT-28, MT-32, ML-42
 +
| rowspan="3" | 1
 
| 1600 1800, 2400
 
| 1600 1800, 2400
 
|-
 
|-
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| 1600, 1800, 2000, <br>2200, 2400
 
| 1600, 1800, 2000, <br>2200, 2400
 
|-
 
|-
| 2005
+
| 2006
 
| Richmond
 
| Richmond
 
| MK-36, MK-38
 
| MK-36, MK-38
 
| 2000, 2200
 
| 2000, 2200
 
|-
 
|-
| rowspan=4 | {{amd|Turion 64 X2}}
+
| rowspan=4 | {{amd|Turion 64 X2}}<br>([[Turion]])
 
| 2006
 
| 2006
 
| Taylor
 
| Taylor
Line 436: Line 382:
 
| 1600
 
| 1600
 
|-
 
|-
|
+
| 2006
 
| Trinidad
 
| Trinidad
 
| TL-52, TL-56, TL-60, TL-64
 
| TL-52, TL-56, TL-60, TL-64
Line 442: Line 388:
 
|-
 
|-
 
| rowspan=2 | [[65 nm]]
 
| rowspan=2 | [[65 nm]]
|
+
| 2007
 
| rowspan=2 | Tyler
 
| rowspan=2 | Tyler
 
| TK-53, TK-55, TK-57
 
| TK-53, TK-55, TK-57
 
| 1700, 1800, 1900
 
| 1700, 1800, 1900
 
|-
 
|-
|
+
| 2007
 
| TL-56, TL-58, TL-60, TL-62, <br>TL-64, TL-66, TL-68  
 
| TL-56, TL-58, TL-60, TL-62, <br>TL-64, TL-66, TL-68  
 
| 1800, 1900, 2000, 2100, <br>2200, 2300, 2400
 
| 1800, 1900, 2000, 2100, <br>2200, 2300, 2400

Latest revision as of 20:38, 1 May 2025

Edit Values
K8 µarch
General Info
Arch TypeCPU
DesignerAMD
ManufacturerAMD
IntroductionSeptember 23, 2003
Phase-out2007
Process130 nm, 90 nm, 65 nm
Core Configs1, 2
Pipeline
OoOEYes
Reg RenamingYes
Decode3
Instructions
ISAx86-64
ExtensionsMMX, SSE, SSE2, SSE3 (some steppings), 3DNow!
Cache
L1I Cache64 KiB/core
L1D Cache64 KiB/core
Succession

K8 (Hammer) was the microarchitecture developed by AMD as a successor to K7.

K8 was superseded by K10 in 2007.

Architecture[edit]

New text document.svg This section is empty; you can help add the missing info by editing this page.

Die Shot[edit]

New text document.svg This section is empty; you can help add the missing info by editing this page.

All K8 Chips[edit]

K8 Chips
ModelFamilyCoreLaunchedPower DissipationFreqMax Mem
Count: 0

K8 Family[edit]

Architecture Process
(nm)
Family Release
date
Code name Model group Cores Clock rate
(MHz)
K8
(x86-64)
(AMD64)
130 nm Opteron 2003 Sledgehammer 100, 200, 800 1 1400–2400
90 nm 2004 Venus 100 1600–3000
2004 Troy 200
2004 Athens 800
2005 Denmark 100 2 1600–3200
2005 Italy 200 1600–3200
2005 Egypt 800 1600–3200
2006 Santa Ana 1200 1800–3200
2006 Santa Rosa 2200 1800–3200
2006 8200 2000–3000
130 nm Athlon 64 FX 2003 Sledgehammer FX-51, FX-53 1 2200, 2400
2003 Clawhammer FX-53, FX-55 2400, 2400
90 nm San Diego FX-55, FX-57 2600, 2800
2005 Toledo FX-60 2 2600
2005 Windsor FX-62 2800
FX-70, FX-72, FX-74 2600, 2800, 3000
130 nm Athlon 64 2003 Clawhammer 1 2000–2600
Newcastle 1800–2400
90 nm Winchester 1800–2200
Venice 1800–2400
San Diego 2200–2600
Orleans 1800–2600
65 nm Lima 2000–2800
130 nm Mobile Athlon 64 2003 Clawhammer 2700+, 2800+, 3000+,
3200+, 3400+, 3700+
1600, 1600, 1800,
2000, 2200, 2400
Odessa 2700+, 2800+, 3000+ 1600, 1800, 2000
90 nm Oakville 2700+, 2800+, 3000+ 1600, 1800, 2000
Newark 3000+, 3200+, 3400+,
3700+, 4000+
1800, 2000, 2200,
2400, 2600
90 nm Athlon 64 X2 2005 Manchester 3600+ 2 2000
3800+, 4200+, 4600+ 2000, 2200, 2400
Toledo 3800+, 4200+, 4600+ 2000, 2200, 2400
4400+, 4800+ 2200, 2400
Windsor 3600+, 3800+, 4200+,
4600+, 5000+, 5400+
2000, 2000, 2200,
2400, 2600, 2800
4000+, 4400+, 4800+,
5200+, 5600+, 6000+, 6400+
2000, 2200, 2400,
2600, 2800, 3000, 3200
65 nm Brisbane 3600+, 3800+, 4000+,
4200+, 4400+, 4600+,
4800+, 5000+, 5200+,
5400+, 5600+, 5800+, 6000+
1900, 2000, 2100,
2200, 2300, 2400,
2500, 2600, 2700,
2800, 2900, 3000, 3100
130 nm Sempron 2004 Paris 3000+, 3100+ 1 1800
90 nm 2004 Palermo 2500+ 1400
2600+, 2800+ 1600
3000+, 3100+ 1800
2005 3300+, 3400+ 2000
3000+, 3200+ 1800
3400+, 3500+ 2000
2006 Manila 2800+, 3200+, 3500+ 1600, 1800, 2000
2006 3000+, 3400+, 3600+, 3800+ 1600, 1800, 2000, 2200
65 nm 2007 Sparta LE-1100, LE-1150 1900, 2000
2007 LE-1200, LE-1250, LE-1300 2100, 2200, 2300
130 nm Mobile Sempron 2004 Dublin 2600+ ÷ 3000+ 1 1600, 1800
90 nm 2005 Georgetown 2600+ ÷ 3300+ 1600, 1800, 2000
2004 Sonora 2600+ ÷ 3100+ 1600, 1800
2005 Albany 3000+ ÷ 3600+ 1800, 2000, 2200
2005 Roma 2800+ ÷ 3400+ 1600, 1800, 2000
2006 Keene 3200+ ÷ 3600+ 1600, 1800, 2000
90 nm Turion 64
(Turion)
2005 Lancaster MT-28, MT-32, ML-42 1 1600 1800, 2400
2005 MT-30, MT-34, MT-37,
MT-40, ML-44
1600, 1800, 2000,
2200, 2400
2006 Richmond MK-36, MK-38 2000, 2200
Turion 64 X2
(Turion)
2006 Taylor TL-50 2 1600
2006 Trinidad TL-52, TL-56, TL-60, TL-64 1600, 1800, 2000, 2200
65 nm 2007 Tyler TK-53, TK-55, TK-57 1700, 1800, 1900
2007 TL-56, TL-58, TL-60, TL-62,
TL-64, TL-66, TL-68
1800, 1900, 2000, 2100,
2200, 2300, 2400

See also[edit]

codenameK8 +
core count1 + and 2 +
designerAMD +
first launchedSeptember 23, 2003 +
full page nameamd/microarchitectures/k8 +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerAMD +
microarchitecture typeCPU +
nameK8 +
phase-out2007 +
process130 nm (0.13 μm, 1.3e-4 mm) +, 90 nm (0.09 μm, 9.0e-5 mm) + and 65 nm (0.065 μm, 6.5e-5 mm) +