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Difference between revisions of "intel/xeon silver/4208"
(As per Intell website, it is only 2400 MHz, https://ark.intel.com/content/www/us/en/ark/products/193390/intel-xeon-silver-4208-processor-11m-cache-2-10-ghz.html) |
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Line 9: | Line 9: | ||
|part number 2=BX806954208 | |part number 2=BX806954208 | ||
|s-spec=SRFBM | |s-spec=SRFBM | ||
+ | |s-spec qs=QPJG | ||
|market=Server | |market=Server | ||
|first announced=April 2, 2019 | |first announced=April 2, 2019 | ||
Line 27: | Line 28: | ||
|core name=Cascade Lake SP | |core name=Cascade Lake SP | ||
|core family=6 | |core family=6 | ||
− | |core stepping=R1 | + | |core stepping=R0 |
+ | |core stepping 2=R1 | ||
|process=14 nm | |process=14 nm | ||
|technology=CMOS | |technology=CMOS | ||
Line 33: | Line 35: | ||
|core count=8 | |core count=8 | ||
|thread count=16 | |thread count=16 | ||
+ | |max memory=1 TiB | ||
|max cpus=2 | |max cpus=2 | ||
− | | | + | |smp interconnect=UPI |
+ | |smp interconnect links=2 | ||
+ | |smp interconnect rate=9.6 GT/s | ||
|tdp=85 W | |tdp=85 W | ||
|tcase min=0 °C | |tcase min=0 °C | ||
|tcase max=78 °C | |tcase max=78 °C | ||
|package name 1=intel,fclga_3647 | |package name 1=intel,fclga_3647 | ||
+ | |predecessor=Xeon Silver 4108 | ||
+ | |predecessor link=intel/xeon silver/4108 | ||
}} | }} | ||
'''Xeon Silver 4208''' is a {{arch|64}} [[octa-core]] [[x86]] mid-range performance server microprocessor introduced by [[Intel]] in early [[2019]]. The Silver 4208 is based on the {{intel|Cascade Lake|l=arch}} microarchitecture and is manufactured on a [[14 nm process]]. This chip supports dual-way multiprocessing, sports one {{x86|AVX-512}} [[FMA]] units as well as two {{intel|Ultra Path Interconnect|UPI}} links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2400 memory, operates at 2.1 GHz with a TDP of 85 W and features a {{intel|turbo boost}} frequency of up to 3.2 GHz. | '''Xeon Silver 4208''' is a {{arch|64}} [[octa-core]] [[x86]] mid-range performance server microprocessor introduced by [[Intel]] in early [[2019]]. The Silver 4208 is based on the {{intel|Cascade Lake|l=arch}} microarchitecture and is manufactured on a [[14 nm process]]. This chip supports dual-way multiprocessing, sports one {{x86|AVX-512}} [[FMA]] units as well as two {{intel|Ultra Path Interconnect|UPI}} links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2400 memory, operates at 2.1 GHz with a TDP of 85 W and features a {{intel|turbo boost}} frequency of up to 3.2 GHz. | ||
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|amdpb2=No | |amdpb2=No | ||
|amdpbod=No | |amdpbod=No | ||
+ | }} | ||
+ | |||
+ | == Frequencies == | ||
+ | {{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}} | ||
+ | {{frequency table | ||
+ | |freq_base=2,100MHz | ||
+ | |freq_1=3,200MHz | ||
+ | |freq_2=3,200MHz | ||
+ | |freq_3=3,000MHz | ||
+ | |freq_4=3,000MHz | ||
+ | |freq_5=2,500MHz | ||
+ | |freq_6=2,500MHz | ||
+ | |freq_7=2,500MHz | ||
+ | |freq_8=2,500MHz | ||
+ | |freq_avx2_base=1,600MHz | ||
+ | |freq_avx2_1=3,000MHz | ||
+ | |freq_avx2_2=3,000MHz | ||
+ | |freq_avx2_3=2,600MHz | ||
+ | |freq_avx2_4=2,600MHz | ||
+ | |freq_avx2_5=2,000MHz | ||
+ | |freq_avx2_6=2,000MHz | ||
+ | |freq_avx2_7=2,000MHz | ||
+ | |freq_avx2_8=2,000MHz | ||
+ | |freq_avx512_base=1,100MHz | ||
+ | |freq_avx512_1=2,000MHz | ||
+ | |freq_avx512_2=2,000MHz | ||
+ | |freq_avx512_3=1,800MHz | ||
+ | |freq_avx512_4=1,800MHz | ||
+ | |freq_avx512_5=1,400MHz | ||
+ | |freq_avx512_6=1,400MHz | ||
+ | |freq_avx512_7=1,400MHz | ||
+ | |freq_avx512_8=1,400MHz | ||
}} | }} |
Latest revision as of 05:54, 6 October 2020
Edit Values | |
Xeon Silver 4208 | |
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General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | 4208 |
Part Number | CD8069503956401, BX806954208 |
S-Spec | SRFBM QPJG (QS) |
Market | Server |
Introduction | April 2, 2019 (announced) April 2, 2019 (launched) |
Release Price | $417.00 (tray) $428.00 (box) |
Shop | Amazon |
General Specs | |
Family | Xeon Silver |
Series | 4200 |
Locked | Yes |
Frequency | 2,100 MHz |
Turbo Frequency | 3,200 MHz (1 core) |
Clock multiplier | 21 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Cascade Lake |
Platform | Purley |
Chipset | Lewisburg |
Core Name | Cascade Lake SP |
Core Family | 6 |
Core Stepping | R0, R1 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 8 |
Threads | 16 |
Max Memory | 1 TiB |
Multiprocessing | |
Max SMP | 2-Way (Multiprocessor) |
Interconnect | UPI |
Interconnect Links | 2 |
Interconnect Rate | 9.6 GT/s |
Electrical | |
TDP | 85 W |
Tcase | 0 °C – 78 °C |
Packaging | |
Package | FCLGA-3647 (FCLGA) |
Dimension | 76.16 mm × 56.6 mm |
Pitch | 0.8585 mm × 0.9906 mm |
Contacts | 3647 |
Socket | Socket P, LGA-3647 |
Succession | |
Xeon Silver 4208 is a 64-bit octa-core x86 mid-range performance server microprocessor introduced by Intel in early 2019. The Silver 4208 is based on the Cascade Lake microarchitecture and is manufactured on a 14 nm process. This chip supports dual-way multiprocessing, sports one AVX-512 FMA units as well as two UPI links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2400 memory, operates at 2.1 GHz with a TDP of 85 W and features a turbo boost frequency of up to 3.2 GHz.
Cache[edit]
- Main article: Cascade Lake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
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Expansion Options |
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Features[edit]
[Edit/Modify Supported Features]
Frequencies[edit]
- See also: Intel's CPU Frequency Behavior
Mode | Base | Turbo Frequency/Active Cores | |||||||
---|---|---|---|---|---|---|---|---|---|
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | ||
Normal | 2,100MHz | 3,200MHz | 3,200MHz | 3,000MHz | 3,000MHz | 2,500MHz | 2,500MHz | 2,500MHz | 2,500MHz |
AVX2 | 1,600MHz | 3,000MHz | 3,000MHz | 2,600MHz | 2,600MHz | 2,000MHz | 2,000MHz | 2,000MHz | 2,000MHz |
AVX512 | 1,100MHz | 2,000MHz | 2,000MHz | 1,800MHz | 1,800MHz | 1,400MHz | 1,400MHz | 1,400MHz | 1,400MHz |
Facts about "Xeon Silver 4208 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Silver 4208 - Intel#pcie + |
base frequency | 2,100 MHz (2.1 GHz, 2,100,000 kHz) + |
chipset | Lewisburg + |
clock multiplier | 21 + |
core count | 8 + |
core family | 6 + |
core name | Cascade Lake SP + |
core stepping | R1 + |
designer | Intel + |
family | Xeon Silver + |
first announced | April 2, 2019 + |
first launched | April 2, 2019 + |
full page name | intel/xeon silver/4208 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions + and Deep Learning Boost + |
has intel deep learning boost | true + |
has intel enhanced speedstep technology | true + |
has intel speed shift technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 11 MiB (11,264 KiB, 11,534,336 B, 0.0107 GiB) + |
ldate | April 2, 2019 + |
main image | ![]() |
manufacturer | Intel + |
market segment | Server + |
max case temperature | 351.15 K (78 °C, 172.4 °F, 632.07 °R) + |
max cpu count | 2 + |
max memory | 1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) + |
max memory bandwidth | 107.3 GiB/s (109,875.2 MiB/s, 115.212 GB/s, 115,212.498 MB/s, 0.105 TiB/s, 0.115 TB/s) + |
max memory channels | 6 + |
microarchitecture | Cascade Lake + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | 4208 + |
name | Xeon Silver 4208 + |
package | FCLGA-3647 + |
part number | CD8069503956401 + and BX806954208 + |
platform | Purley + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 417.00 (€ 375.30, £ 337.77, ¥ 43,088.61) + and $ 428.00 (€ 385.20, £ 346.68, ¥ 44,225.24) + |
release price (box) | $ 428.00 (€ 385.20, £ 346.68, ¥ 44,225.24) + |
release price (tray) | $ 417.00 (€ 375.30, £ 337.77, ¥ 43,088.61) + |
s-spec | SRFBM + |
series | 4200 + |
smp max ways | 2 + |
socket | Socket P + and LGA-3647 + |
supported memory type | DDR4-2400 + |
tdp | 85 W (85,000 mW, 0.114 hp, 0.085 kW) + |
technology | CMOS + |
thread count | 16 + |
turbo frequency (1 core) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |