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Difference between revisions of "intel/core m/m3-8114y"
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|locked=Yes | |locked=Yes | ||
|frequency=1,500 MHz | |frequency=1,500 MHz | ||
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|bus type=OPI | |bus type=OPI | ||
|bus rate=4 GT/s | |bus rate=4 GT/s | ||
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|isa=x86-64 | |isa=x86-64 | ||
|isa family=x86 | |isa family=x86 | ||
− | |microarch= | + | |microarch=Cannon Lake |
− | + | |core name=Cannon Lake Y | |
− | |core name= | ||
|core family=6 | |core family=6 | ||
− | + | |process=10 nm | |
− | |process= | ||
|technology=CMOS | |technology=CMOS | ||
|word size=64 bit | |word size=64 bit | ||
|core count=2 | |core count=2 | ||
|thread count=4 | |thread count=4 | ||
+ | |max memory=16 GiB | ||
|max cpus=1 | |max cpus=1 | ||
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}} | }} | ||
− | '''Core M3-8114Y''' is a {{arch|64}} [[dual-core]] low-end performance ultra-low power [[x86]] mobile microprocessor introduced by [[Intel]] in | + | '''Core M3-8114Y''' is a {{arch|64}} [[dual-core]] low-end performance ultra-low power [[x86]] mobile microprocessor expected to be introduced by [[Intel]] in mid [[2018]]. This chip, which is based on the {{intel|Cannon Lake|l=arch}} microarchitecture, is fabricated on [[Intel's 10 nm process]]. The M3-8114Y operates at 1.5 GHz with a TDP of 5 W. The processor supports up to 16 GiB of dual-channel ? memory and incorporates Intel's {{intel|UHD Graphics ?}} [[IGP]] operating at ? MHz with a burst frequency of ? MHz. |
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== Cache == | == Cache == | ||
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== Memory controller == | == Memory controller == | ||
{{memory controller | {{memory controller | ||
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|ecc=No | |ecc=No | ||
|max mem=16 GiB | |max mem=16 GiB | ||
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== Graphics == | == Graphics == | ||
{{integrated graphics | {{integrated graphics | ||
− | | gpu = UHD Graphics | + | | gpu = UHD Graphics ? |
| device id = | | device id = | ||
| designer = Intel | | designer = Intel | ||
− | | execution units = | + | | execution units = ? |
| max displays = 3 | | max displays = 3 | ||
| max memory = 16 GiB | | max memory = 16 GiB | ||
Line 152: | Line 125: | ||
|avx=Yes | |avx=Yes | ||
|avx2=Yes | |avx2=Yes | ||
− | |avx512f= | + | |avx512f=No |
− | |avx512cd= | + | |avx512cd=No |
|avx512er=No | |avx512er=No | ||
|avx512pf=No | |avx512pf=No | ||
− | |avx512bw= | + | |avx512bw=No |
− | |avx512dq= | + | |avx512dq=No |
− | |avx512vl= | + | |avx512vl=No |
− | |avx512ifma= | + | |avx512ifma=No |
− | |avx512vbmi= | + | |avx512vbmi=No |
|avx5124fmaps=No | |avx5124fmaps=No | ||
|avx5124vnniw=No | |avx5124vnniw=No |
Latest revision as of 06:08, 17 April 2020
Edit Values | |
M3-8114Y | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | M3-8114Y |
Market | Mobile |
Shop | Amazon |
General Specs | |
Family | Core M3 |
Series | M3-8000 |
Locked | Yes |
Frequency | 1,500 MHz |
Bus type | OPI |
Bus rate | 4 GT/s |
Clock multiplier | 15 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Cannon Lake |
Core Name | Cannon Lake Y |
Core Family | 6 |
Process | 10 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 2 |
Threads | 4 |
Max Memory | 16 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Core M3-8114Y is a 64-bit dual-core low-end performance ultra-low power x86 mobile microprocessor expected to be introduced by Intel in mid 2018. This chip, which is based on the Cannon Lake microarchitecture, is fabricated on Intel's 10 nm process. The M3-8114Y operates at 1.5 GHz with a TDP of 5 W. The processor supports up to 16 GiB of dual-channel ? memory and incorporates Intel's UHD Graphics ? IGP operating at ? MHz with a burst frequency of ? MHz.
Cache[edit]
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Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
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Expansion Options
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Graphics[edit]
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Integrated Graphics Information
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[Edit] Coffee Lake (Gen9.5) Hardware Accelerated Video Capabilities | |||||||
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Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, MVC, Stereo | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main | 5.1 | 2160p (4K) | Main | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | 3840x3840 | |||
VP8 | Unified | Unified | N/A | 0 | Unified | 1080p | |
VP9 | 0 | 2160p (4K) | 0, 2 | Unified | 2160p (4K) |
Features[edit]
[Edit/Modify Supported Features]
Facts about "Core M3-8114Y - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core M3-8114Y - Intel#io + |
base frequency | 1,500 MHz (1.5 GHz, 1,500,000 kHz) + |
bus rate | 4,000 MT/s (4 GT/s, 4,000,000 kT/s) + |
bus type | OPI + |
chipset | Cannon Point + |
clock multiplier | 15 + |
core count | 2 + |
core family | 6 + |
core model | 102 + |
core name | Amber Lake Y + |
designer | Intel + |
family | Core M3 + |
full page name | intel/core m/m3-8114y + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology + and My WiFi Technology + |
has intel enhanced speedstep technology | true + |
has intel flex memory access support | true + |
has intel my wifi technology support | true + |
has intel secure key technology | true + |
has intel smart response technology support | true + |
has intel speed shift technology | true + |
has intel supervisor mode execution protection | true + |
has intel turbo boost technology 2 0 | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | UHD Graphics 615 + |
integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 24 + |
integrated gpu max memory | 16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB) + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
ldate | 3000 + |
manufacturer | Intel + |
market segment | Mobile + |
max cpu count | 1 + |
max memory | 16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) + |
max memory bandwidth | 31.78 GiB/s (32,542.72 MiB/s, 34.124 GB/s, 34,123.515 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 10 + |
microarchitecture | Amber Lake + |
model number | M3-8114Y + |
name | M3-8114Y + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
series | M3-8000 + |
smp max ways | 1 + |
supported memory type | LPDDR4-2133 + and LPDDR4X-2133 + |
tdp | 4.5 W (4,500 mW, 0.00603 hp, 0.0045 kW) + |
technology | CMOS + |
thread count | 4 + |
turbo frequency (1 core) | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |
x86/has software guard extensions | true + |