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Difference between revisions of "amd/epyc/7f72"
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|tdp=240 W
 
|tdp=240 W
 
|package name 1=amd,socket_sp3
 
|package name 1=amd,socket_sp3
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}}
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'''EPYC 7F72''' is a {{arch|64}} [[tetracosa-core]] [[x86]] server microprocessor designed and introduced by [[AMD]] in mid-[[2020]]. This [[multi-chip package|multi-chip processor]], which is based on the {{amd|Zen 2|Zen 2 microarchitecture|l=arch}}, incorporates logic fabricated [[TSMC]] [[7 nm process]] and I/O fabricated on [[GlobalFoundries]] [[14 nm process]]. The 7F72 has a TDP of 240 W with a base frequency of 3.2 GHz and a {{amd|precision boost|boost}} frequency of up to 3.7 GHz. This processor supports up to two-way [[symmetric multiprocessing|SMP]] and up to 4 TiB of eight channels DDR4-3200 memory per socket.
 +
 +
This ''7F72'' is a frequency-optimized SKU, specifically binned for higher base frequency.
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{{#set: part of=Frequency-optimized SKUs}}
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== Cache ==
 +
{{main|amd/microarchitectures/zen 2#Memory_Hierarchy|l1=Zen 2 § Cache}}
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{{cache size
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|l1 cache=1.5 MiB
 +
|l1i cache=768 KiB
 +
|l1i break=24x32 KiB
 +
|l1i desc=8-way set associative
 +
|l1d cache=768 KiB
 +
|l1d break=24x32 KiB
 +
|l1d desc=8-way set associative
 +
|l2 cache=12 MiB
 +
|l2 break=24x512 KiB
 +
|l2 desc=8-way set associative
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|l2 policy=write-back
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|l3 cache=192 MiB
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|l3 break=12x16 MiB
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}}
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== Memory controller ==
 +
{{memory controller
 +
|type=DDR4-3200
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|ecc=Yes
 +
|max mem=4 TiB
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|controllers=8
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|channels=8
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|max bandwidth=190.7 GiB/s
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|bandwidth schan=23.84 GiB/s
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|bandwidth dchan=47.68 GiB/s
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|bandwidth qchan=95.37 GiB/s
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|bandwidth hchan=143.1 GiB/s
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|bandwidth ochan=190.7 GiB/s
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}}
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 +
== Expansions ==
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{{expansions main
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|
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{{expansions entry
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|type=PCIe
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|pcie revision=4.0
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|pcie lanes=128
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|pcie config=x16
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|pcie config 2=x8
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}}
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}}
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== Features ==
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{{x86 features
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|real=Yes
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|protected=Yes
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|smm=Yes
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|fpu=Yes
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|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=Yes
 +
|sse_gfni=No
 +
|avx=Yes
 +
|avx_gfni=No
 +
|avx2=Yes
 +
|avx512f=No
 +
|avx512cd=No
 +
|avx512er=No
 +
|avx512pf=No
 +
|avx512bw=No
 +
|avx512dq=No
 +
|avx512vl=No
 +
|avx512ifma=No
 +
|avx512vbmi=No
 +
|avx5124fmaps=No
 +
|avx512vnni=No
 +
|avx5124vnniw=No
 +
|avx512vpopcntdq=No
 +
|avx512gfni=No
 +
|avx512vaes=No
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|avx512vbmi2=No
 +
|avx512bitalg=No
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|avx512vpclmulqdq=No
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|abm=Yes
 +
|tbm=No
 +
|bmi1=Yes
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|bmi2=Yes
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|fma3=Yes
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|fma4=No
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|aes=Yes
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|rdrand=Yes
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|sha=Yes
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|xop=No
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|adx=Yes
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|clmul=Yes
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|f16c=Yes
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|bfloat16=No
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|tbt1=No
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|tbt2=No
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|tbmt3=No
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|tvb=No
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|bpt=No
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|eist=No
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|sst=No
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|flex=No
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|fastmem=No
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|ivmd=No
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|intelnodecontroller=No
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|intelnode=No
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|kpt=No
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|ptt=No
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|intelrunsure=No
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|mbe=No
 +
|isrt=No
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|sba=No
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|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=No
 +
|txt=No
 +
|ht=No
 +
|vpro=No
 +
|vtx=No
 +
|vtd=No
 +
|ept=No
 +
|mpx=No
 +
|sgx=No
 +
|securekey=No
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|osguard=No
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|intqat=No
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|dlboost=No
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|3dnow=No
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|e3dnow=No
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|smartmp=No
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|powernow=No
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|amdvi=Yes
 +
|amdv=Yes
 +
|amdsme=Yes
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|amdtsme=Yes
 +
|amdsev=Yes
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|rvi=No
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|smt=Yes
 +
|sensemi=Yes
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|xfr=No
 +
|xfr2=No
 +
|mxfr=No
 +
|amdpb=No
 +
|amdpb2=Yes
 +
|amdpbod=No
 
}}
 
}}

Latest revision as of 10:06, 15 April 2020

Edit Values
EPYC 7F72
General Info
DesignerAMD
ManufacturerTSMC, GlobalFoundries
Model Number7F72
Part Number100-000000141,
100-000000141WOF
MarketServer
IntroductionApril 14, 2020 (announced)
April 14, 2020 (launched)
Release Price$2,450 (tray)
ShopAmazon
General Specs
FamilyEPYC
Series7002
LockedYes
Frequency3,200 MHz
Turbo Frequency3,700 MHz
Clock multiplier32
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen 2
Core NameRome
Core Family23
Process7 nm, 14 nm
TechnologyCMOS
MCPYes (7 dies)
Word Size64 bit
Cores24
Threads48
Max Memory4 TiB
Multiprocessing
Max SMP2-Way (Multiprocessor)
Electrical
TDP240 W
Packaging
PackageSP3, FCLGA-4094 (FC-OLGA)
Dimension75.4 mm × 58.5 mm × 6.26 mm
Pitch0.87 mm × 1 mm
Contacts4094
SocketSP3, LGA-4094

EPYC 7F72 is a 64-bit tetracosa-core x86 server microprocessor designed and introduced by AMD in mid-2020. This multi-chip processor, which is based on the Zen 2 microarchitecture, incorporates logic fabricated TSMC 7 nm process and I/O fabricated on GlobalFoundries 14 nm process. The 7F72 has a TDP of 240 W with a base frequency of 3.2 GHz and a boost frequency of up to 3.7 GHz. This processor supports up to two-way SMP and up to 4 TiB of eight channels DDR4-3200 memory per socket.

This 7F72 is a frequency-optimized SKU, specifically binned for higher base frequency.


Cache[edit]

Main article: Zen 2 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$1.5 MiB
1,536 KiB
1,572,864 B
L1I$768 KiB
786,432 B
0.75 MiB
24x32 KiB8-way set associative 
L1D$768 KiB
786,432 B
0.75 MiB
24x32 KiB8-way set associative 
L2$12 MiB
12,288 KiB
12,582,912 B
0.0117 GiB
  24x512 KiB8-way set associativewrite-back
L3$192 MiB
196,608 KiB
201,326,592 B
0.188 GiB
  12x16 MiB  

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-3200
Supports ECCYes
Max Mem4 TiB
Controllers8
Channels8
Max Bandwidth190.7 GiB/s
195,276.8 MiB/s
204.763 GB/s
204,762.566 MB/s
0.186 TiB/s
0.205 TB/s
Bandwidth
Single 23.84 GiB/s
Double 47.68 GiB/s
Quad 95.37 GiB/s
Hexa 143.1 GiB/s
Octa 190.7 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 4.0
Max Lanes: 128
Configuration: x16, x8


Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
SSE4aStreaming SIMD Extensions 4a
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
SHASHA Extensions
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
SMTSimultaneous Multithreading
AMD-ViAMD-Vi (I/O MMU virtualization)
AMD-VAMD Virtualization
SMESecure Memory Encryption
TSMETransparent SME
SEVSecure Encrypted Virtualization
SenseMISenseMI Technology
Boost 2Precision Boost 2
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/epyc/7f72&oldid=96648"
Facts about "EPYC 7F72 - AMD"
RDF feed
base frequency3,200 MHz (3.2 GHz, 3,200,000 kHz) +
clock multiplier32 +
core count24 +
core family23 +
core nameRome +
designerAMD +
die count7 +
familyEPYC +
first announcedApril 14, 2020 +
first launchedApril 14, 2020 +
full page nameamd/epyc/7f72 +
has locked clock multipliertrue +
instance ofmicroprocessor +
is multi-chip packagetrue +
isax86-64 +
isa familyx86 +
ldateApril 14, 2020 +
manufacturerTSMC + and GlobalFoundries +
market segmentServer +
max cpu count2 +
max memory4,194,304 MiB (4,294,967,296 KiB, 4,398,046,511,104 B, 4,096 GiB, 4 TiB) +
microarchitectureZen 2 +
model number7F72 +
nameEPYC 7F72 +
packageSP3 + and FCLGA-4094 +
part number100-000000141 + and 100-000000141WOF +
process7 nm (0.007 μm, 7.0e-6 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 2,450.00 (€ 2,205.00, £ 1,984.50, ¥ 253,158.50) +
release price (tray)$ 2,450.00 (€ 2,205.00, £ 1,984.50, ¥ 253,158.50) +
series7002 +
smp max ways2 +
socketSP3 + and LGA-4094 +
tdp240 W (240,000 mW, 0.322 hp, 0.24 kW) +
technologyCMOS +
thread count48 +
turbo frequency3,700 MHz (3.7 GHz, 3,700,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +