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Difference between revisions of "intel/xeon w/w-2155"
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{{intel title|Xeon W-2155}} | {{intel title|Xeon W-2155}} | ||
{{chip | {{chip | ||
− | |||
|name=Xeon W-2155 | |name=Xeon W-2155 | ||
|image=intel skylake w (front).png | |image=intel skylake w (front).png | ||
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|first announced=August 29, 2017 | |first announced=August 29, 2017 | ||
|first launched=August 29, 2017 | |first launched=August 29, 2017 | ||
− | |release price=$1440.00 | + | |release price (tray)=$1440.00 |
|family=Xeon W | |family=Xeon W | ||
|series=W-2000 | |series=W-2000 | ||
Line 40: | Line 39: | ||
|tcase min=0 °C | |tcase min=0 °C | ||
|tcase max=68 °C | |tcase max=68 °C | ||
− | |package | + | |package name 1=intel,fclga_2066 |
}} | }} | ||
'''W-2155''' is a {{arch|64}} [[deca-core]] [[x86]] enterprise performance workstation microprocessor introduced by [[Intel]] in [[2017]]. This processors, which is fabricated on an enhanced [[14 nm process|14nm+ process]] based on the {{intel|Skylake (server)|Skylake}} server microarchitecture, operates at 3.3 GHz with a [[TDP]] of 140 W and a {{intel|turbo boost}} frequency of up to 4.5 GHz. This chip supports up to 512 GiB of quad-channel DDR4-2666 ECC memory. | '''W-2155''' is a {{arch|64}} [[deca-core]] [[x86]] enterprise performance workstation microprocessor introduced by [[Intel]] in [[2017]]. This processors, which is fabricated on an enhanced [[14 nm process|14nm+ process]] based on the {{intel|Skylake (server)|Skylake}} server microarchitecture, operates at 3.3 GHz with a [[TDP]] of 140 W and a {{intel|turbo boost}} frequency of up to 4.5 GHz. This chip supports up to 512 GiB of quad-channel DDR4-2666 ECC memory. | ||
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|sensemi=No | |sensemi=No | ||
|xfr=No | |xfr=No | ||
+ | }} | ||
+ | |||
+ | == Frequencies == | ||
+ | {{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}} | ||
+ | {{frequency table | ||
+ | |freq_base=3,300 MHz | ||
+ | |freq_1=4,500 MHz | ||
+ | |freq_2=4,500 MHz | ||
+ | |freq_3=4,300 MHz | ||
+ | |freq_4=4,300 MHz | ||
+ | |freq_5=4,200 MHz | ||
+ | |freq_6=4,200 MHz | ||
+ | |freq_7=4,200 MHz | ||
+ | |freq_8=4,200 MHz | ||
+ | |freq_9=4,000 MHz | ||
+ | |freq_10=4,000 MHz | ||
+ | |freq_avx2_1=4,000 MHz | ||
+ | |freq_avx2_2=4,000 MHz | ||
+ | |freq_avx2_3=3,800 MHz | ||
+ | |freq_avx2_4=3,800 MHz | ||
+ | |freq_avx2_5=3,700 MHz | ||
+ | |freq_avx2_6=3,700 MHz | ||
+ | |freq_avx2_7=3,700 MHz | ||
+ | |freq_avx2_8=3,700 MHz | ||
+ | |freq_avx2_9=3,600 MHz | ||
+ | |freq_avx2_10=3,600 MHz | ||
+ | |freq_avx512_1=4,000 MHz | ||
+ | |freq_avx512_2=4,000 MHz | ||
+ | |freq_avx512_3=3,800 MHz | ||
+ | |freq_avx512_4=3,800 MHz | ||
+ | |freq_avx512_5=3,500 MHz | ||
+ | |freq_avx512_6=3,500 MHz | ||
+ | |freq_avx512_7=3,500 MHz | ||
+ | |freq_avx512_8=3,500 MHz | ||
+ | |freq_avx512_9=3,300 MHz | ||
+ | |freq_avx512_10=3,300 MHz | ||
}} | }} |
Latest revision as of 14:22, 3 July 2019
Edit Values | |
Xeon W-2155 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | W-2155 |
Part Number | CD8067303533703 |
S-Spec | SR3LR QMVT (QS) |
Market | Workstation |
Introduction | August 29, 2017 (announced) August 29, 2017 (launched) |
Release Price | $1440.00 (tray) |
Shop | Amazon |
General Specs | |
Family | Xeon W |
Series | W-2000 |
Locked | Yes |
Frequency | 3,300 MHz |
Turbo Frequency | 4,500 MHz (1 core) |
Bus type | DMI 3.0 |
Bus rate | 4 × 8 GT/s |
Clock multiplier | 33 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Skylake (server) |
Platform | Basin Falls |
Core Name | Skylake W |
Core Family | 6 |
Core Stepping | U0 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 10 |
Threads | 20 |
Max Memory | 512 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 140 W |
Tcase | 0 °C – 68 °C |
Packaging | |
Package | FCLGA-2066 (LGA) |
Dimension | 52.5 mm × 45 mm |
Pitch | 1.016 mm |
Contacts | 2066 |
Socket | Socket R4 |
W-2155 is a 64-bit deca-core x86 enterprise performance workstation microprocessor introduced by Intel in 2017. This processors, which is fabricated on an enhanced 14nm+ process based on the Skylake server microarchitecture, operates at 3.3 GHz with a TDP of 140 W and a turbo boost frequency of up to 4.5 GHz. This chip supports up to 512 GiB of quad-channel DDR4-2666 ECC memory.
Cache[edit]
- Main article: Skylake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options |
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Features[edit]
[Edit/Modify Supported Features]
Frequencies[edit]
- See also: Intel's CPU Frequency Behavior
Mode | Base | Turbo Frequency/Active Cores | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | ||
Normal | 3,300 MHz | 4,500 MHz | 4,500 MHz | 4,300 MHz | 4,300 MHz | 4,200 MHz | 4,200 MHz | 4,200 MHz | 4,200 MHz | 4,000 MHz | 4,000 MHz |
AVX2 | 4,000 MHz | 4,000 MHz | 3,800 MHz | 3,800 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,600 MHz | 3,600 MHz | |
AVX512 | 4,000 MHz | 4,000 MHz | 3,800 MHz | 3,800 MHz | 3,500 MHz | 3,500 MHz | 3,500 MHz | 3,500 MHz | 3,300 MHz | 3,300 MHz |
Facts about "Xeon W-2155 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon W-2155 - Intel#pcie + |
base frequency | 3,300 MHz (3.3 GHz, 3,300,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | DMI 3.0 + |
clock multiplier | 33 + |
core count | 10 + |
core family | 6 + |
core name | Skylake W + |
core stepping | U0 + |
designer | Intel + |
family | Xeon W + |
first announced | August 29, 2017 + |
first launched | August 29, 2017 + |
full page name | intel/xeon w/w-2155 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Secure Key Technology +, OS Guard + and Identity Protection Technology + |
has intel enhanced speedstep technology | true + |
has intel identity protection technology support | true + |
has intel secure key technology | true + |
has intel speed shift technology | true + |
has intel supervisor mode execution protection | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 640 KiB (655,360 B, 0.625 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 320 KiB (327,680 B, 0.313 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 320 KiB (327,680 B, 0.313 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 10 MiB (10,240 KiB, 10,485,760 B, 0.00977 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 13.75 MiB (14,080 KiB, 14,417,920 B, 0.0134 GiB) + |
ldate | August 29, 2017 + |
main image | + |
manufacturer | Intel + |
market segment | Workstation + |
max case temperature | 341.15 K (68 °C, 154.4 °F, 614.07 °R) + |
max cpu count | 1 + |
max memory | 524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) + |
max memory bandwidth | 79.47 GiB/s (81,377.28 MiB/s, 85.33 GB/s, 85,330.263 MB/s, 0.0776 TiB/s, 0.0853 TB/s) + |
max memory channels | 4 + |
microarchitecture | Skylake (server) + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | W-2155 + |
name | Xeon W-2155 + |
number of avx-512 execution units | 2 + |
package | FCLGA-2066 + |
part number | CD8067303533703 + |
platform | Basin Falls + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 1,440.00 (€ 1,296.00, £ 1,166.40, ¥ 148,795.20) + |
release price (tray) | $ 1,440.00 (€ 1,296.00, £ 1,166.40, ¥ 148,795.20) + |
s-spec | SR3LR + |
s-spec (qs) | QMVT + |
series | W-2000 + |
smp max ways | 1 + |
socket | Socket R4 + |
supported memory type | DDR4-2666 + |
tdp | 140 W (140,000 mW, 0.188 hp, 0.14 kW) + |
technology | CMOS + |
thread count | 20 + |
turbo frequency (1 core) | 4,500 MHz (4.5 GHz, 4,500,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |