Semiconductor & Computer Engineering
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Difference between revisions of "intel/xeon w/w-3235"
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Revision as of 14:25, 3 June 2019
| Edit Values | |
| Xeon W-3235 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | W-3235 |
| Part Number | CD8069504152802 |
| Market | Workstation |
| Shop | Amazon |
| General Specs | |
| Family | Xeon W |
| Series | W-3200 |
| Locked | Yes |
| Frequency | 3,300 MHz |
| Clock multiplier | 33 |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Cascade Lake |
| Core Name | Cascade Lake W |
| Process | 14 nm |
| Technology | CMOS |
| Word Size | 64 bit |
| Cores | 12 |
| Threads | 24 |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| TDP | 180 W |
W-3235 is a 64-bit dodeca-core x86 enterprise performance workstation microprocessor introduced by Intel in 2019. This processors, which is fabricated on an enhanced 14nm++ process based on the Cascade Lake microarchitecture, operates at 3.3 GHz with a TDP of 180 W and a turbo boost frequency of up to ? GHz.
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Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release. |
Contents
Cache
- Main article: Skylake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Expansions
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Expansion Options |
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Features
[Edit/Modify Supported Features]
Facts about "Xeon W-3235 - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon W-3235 - Intel#pcie + |
| base frequency | 3,300 MHz (3.3 GHz, 3,300,000 kHz) + |
| clock multiplier | 33 + |
| core count | 12 + |
| core name | Cascade Lake W + |
| designer | Intel + |
| family | Xeon W + |
| full page name | intel/xeon w/w-3235 + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has advanced vector extensions 512 | true + |
| has ecc memory support | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Secure Key Technology +, OS Guard + and Identity Protection Technology + |
| has intel enhanced speedstep technology | true + |
| has intel identity protection technology support | true + |
| has intel secure key technology | true + |
| has intel speed shift technology | true + |
| has intel supervisor mode execution protection | true + |
| has intel trusted execution technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has intel vpro technology | true + |
| has intel vt-d technology | true + |
| has intel vt-x technology | true + |
| has locked clock multiplier | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| instance of | microprocessor + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 768 KiB (786,432 B, 0.75 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 384 KiB (393,216 B, 0.375 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 384 KiB (393,216 B, 0.375 MiB) + |
| l2$ description | 16-way set associative + |
| l2$ size | 12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) + |
| l3$ description | 11-way set associative + |
| l3$ size | 16.5 MiB (16,896 KiB, 17,301,504 B, 0.0161 GiB) + |
| ldate | 3000 + |
| manufacturer | Intel + |
| market segment | Workstation + |
| max cpu count | 1 + |
| max memory bandwidth | 131.13 GiB/s (134,277.12 MiB/s, 140.8 GB/s, 140,799.765 MB/s, 0.128 TiB/s, 0.141 TB/s) + |
| max memory channels | 6 + |
| microarchitecture | Cascade Lake + |
| model number | W-3235 + |
| name | Xeon W-3235 + |
| number of avx-512 execution units | 2 + |
| part number | CD8069504152802 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| series | W-3200 + |
| smp max ways | 1 + |
| supported memory type | DDR4-2933 + |
| tdp | 180 W (180,000 mW, 0.241 hp, 0.18 kW) + |
| technology | CMOS + |
| thread count | 24 + |
| word size | 64 bit (8 octets, 16 nibbles) + |
| x86/has memory protection extensions | true + |