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{{intel title|Xeon Platinum 8260M}} | {{intel title|Xeon Platinum 8260M}} | ||
− | {{chip}} | + | {{chip |
− | '''Xeon Platinum 8260M''' is a {{arch|64}} [[24-core]] [[x86]] | + | |name=Xeon Platinum 8260M |
+ | |image=cascade lake sp (front).png | ||
+ | |designer=Intel | ||
+ | |manufacturer=Intel | ||
+ | |model number=8260M | ||
+ | |part number=CD8069504201201 | ||
+ | |s-spec=SRF9J | ||
+ | |market=Server | ||
+ | |first announced=April 2, 2019 | ||
+ | |first launched=April 2, 2019 | ||
+ | |release price (tray)=$7,705.00 | ||
+ | |family=Xeon Platinum | ||
+ | |series=8200 | ||
+ | |locked=Yes | ||
+ | |frequency=2,400 MHz | ||
+ | |turbo frequency1=3,900 MHz | ||
+ | |clock multiplier=24 | ||
+ | |cpuid=0x50655 | ||
+ | |isa=x86-64 | ||
+ | |isa family=x86 | ||
+ | |microarch=Cascade Lake | ||
+ | |platform=Purley | ||
+ | |chipset=Lewisburg | ||
+ | |core name=Cascade Lake SP | ||
+ | |core family=6 | ||
+ | |core stepping=B1 | ||
+ | |process=14 nm | ||
+ | |technology=CMOS | ||
+ | |word size=64 bit | ||
+ | |core count=24 | ||
+ | |thread count=48 | ||
+ | |max cpus=8 | ||
+ | |max memory=2 TiB | ||
+ | |tdp=165 W | ||
+ | |package name 1=intel,fclga_3647 | ||
+ | }} | ||
+ | '''Xeon Platinum 8260M''' is a {{arch|64}} [[24-core]] [[x86]] high-performance server microprocessor introduced by [[Intel]] in early [[2019]]. The Platinum 8260M is based on the {{intel|Cascade Lake|l=arch}} microarchitecture and is manufactured on a [[14 nm process]]. This chip supports 8-way multiprocessing, sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor supports up 2 TiB of hexa-channel DDR4-2933 memory, operates at 2.4 GHz with a TDP of 165 W and features a {{intel|turbo boost}} frequency of up to 3.9 GHz. | ||
+ | |||
+ | As indicated by the "''M''" suffix, this model features large memory support of up to 2 TiB of memory. | ||
+ | |||
+ | |||
+ | == Cache == | ||
+ | {{main|intel/microarchitectures/cascade lake#Memory_Hierarchy|l1=Cascade Lake § Cache}} | ||
+ | The Xeon Platinum 8260M features a larger non-default 35.75 MiB of [[L3]], a size that would normally be found on a 26-core part. | ||
+ | {{cache size | ||
+ | |l1 cache=1.5 MiB | ||
+ | |l1i cache=768 KiB | ||
+ | |l1i break=24x32 KiB | ||
+ | |l1i desc=8-way set associative | ||
+ | |l1d cache=768 KiB | ||
+ | |l1d break=24x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l1d policy=write-back | ||
+ | |l2 cache=24 MiB | ||
+ | |l2 break=24x1 MiB | ||
+ | |l2 desc=16-way set associative | ||
+ | |l2 policy=write-back | ||
+ | |l3 cache=35.75 MiB | ||
+ | |l3 break=26x1.375 MiB | ||
+ | |l3 desc=11-way set associative | ||
+ | |l3 policy=write-back | ||
+ | }} | ||
+ | |||
+ | == Memory controller == | ||
+ | {{memory controller | ||
+ | |type=DDR4-2933 | ||
+ | |ecc=Yes | ||
+ | |max mem=2 TiB | ||
+ | |controllers=2 | ||
+ | |channels=6 | ||
+ | |max bandwidth=131.13 GiB/s | ||
+ | |bandwidth schan=21.86 GiB/s | ||
+ | |bandwidth dchan=43.71 GiB/s | ||
+ | |bandwidth qchan=87.42 GiB/s | ||
+ | |bandwidth hchan=131.13 GiB/s | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions main | ||
+ | | | ||
+ | {{expansions entry | ||
+ | |type=PCIe | ||
+ | |pcie revision=3.0 | ||
+ | |pcie lanes=48 | ||
+ | |pcie config=1x16 | ||
+ | |pcie config 2=x8 | ||
+ | |pcie config 3=x4 | ||
+ | }} | ||
+ | }} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=No | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
+ | |avx512f=Yes | ||
+ | |avx512cd=Yes | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=Yes | ||
+ | |avx512dq=Yes | ||
+ | |avx512vl=Yes | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx512vnni=Yes | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |avx512units=2 | ||
+ | |abm=Yes | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=Yes | ||
+ | |clmul=Yes | ||
+ | |f16c=Yes | ||
+ | |bfloat16=No | ||
+ | |tbt1=No | ||
+ | |tbt2=Yes | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=Yes | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=Yes | ||
+ | |intelnodecontroller=Yes | ||
+ | |intelnode=Yes | ||
+ | |kpt=Yes | ||
+ | |ptt=Yes | ||
+ | |intelrunsure=Yes | ||
+ | |mbe=Yes | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=Yes | ||
+ | |txt=Yes | ||
+ | |ht=Yes | ||
+ | |vpro=Yes | ||
+ | |vtx=Yes | ||
+ | |vtd=Yes | ||
+ | |ept=Yes | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=No | ||
+ | |dlboost=Yes | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
+ | |xfr2=No | ||
+ | |mxfr=No | ||
+ | |amdpb=No | ||
+ | |amdpb2=No | ||
+ | |amdpbod=No | ||
+ | }} |
Revision as of 02:52, 6 April 2019
Edit Values | |
Xeon Platinum 8260M | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | 8260M |
Part Number | CD8069504201201 |
S-Spec | SRF9J |
Market | Server |
Introduction | April 2, 2019 (announced) April 2, 2019 (launched) |
Release Price | $7,705.00 (tray) |
Shop | Amazon |
General Specs | |
Family | Xeon Platinum |
Series | 8200 |
Locked | Yes |
Frequency | 2,400 MHz |
Turbo Frequency | 3,900 MHz (1 core) |
Clock multiplier | 24 |
CPUID | 0x50655 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Cascade Lake |
Platform | Purley |
Chipset | Lewisburg |
Core Name | Cascade Lake SP |
Core Family | 6 |
Core Stepping | B1 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 24 |
Threads | 48 |
Max Memory | 2 TiB |
Multiprocessing | |
Max SMP | 8-Way (Multiprocessor) |
Electrical | |
TDP | 165 W |
Packaging | |
Package | FCLGA-3647 (FCLGA) |
Dimension | 76.16 mm × 56.6 mm |
Pitch | 0.8585 mm × 0.9906 mm |
Contacts | 3647 |
Socket | Socket P, LGA-3647 |
Xeon Platinum 8260M is a 64-bit 24-core x86 high-performance server microprocessor introduced by Intel in early 2019. The Platinum 8260M is based on the Cascade Lake microarchitecture and is manufactured on a 14 nm process. This chip supports 8-way multiprocessing, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor supports up 2 TiB of hexa-channel DDR4-2933 memory, operates at 2.4 GHz with a TDP of 165 W and features a turbo boost frequency of up to 3.9 GHz.
As indicated by the "M" suffix, this model features large memory support of up to 2 TiB of memory.
Contents
Cache
- Main article: Cascade Lake § Cache
The Xeon Platinum 8260M features a larger non-default 35.75 MiB of L3, a size that would normally be found on a 26-core part.
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
Expansion Options |
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Features
[Edit/Modify Supported Features]
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Platinum 8260M - Intel#pcie + |
base frequency | 2,400 MHz (2.4 GHz, 2,400,000 kHz) + |
chipset | Lewisburg + |
clock multiplier | 24 + |
core count | 24 + |
core family | 6 + |
core name | Cascade Lake SP + |
core stepping | B1 + |
cpuid | 0x50655 + |
designer | Intel + |
family | Xeon Platinum + |
first announced | April 2, 2019 + |
first launched | April 2, 2019 + |
full page name | intel/xeon platinum/8260m + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions + and Deep Learning Boost + |
has intel deep learning boost | true + |
has intel enhanced speedstep technology | true + |
has intel speed shift technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 24 MiB (24,576 KiB, 25,165,824 B, 0.0234 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 35.75 MiB (36,608 KiB, 37,486,592 B, 0.0349 GiB) + |
ldate | April 2, 2019 + |
main image | + |
manufacturer | Intel + |
market segment | Server + |
max cpu count | 8 + |
max memory | 2,097,152 MiB (2,147,483,648 KiB, 2,199,023,255,552 B, 2,048 GiB, 2 TiB) + |
max memory bandwidth | 131.13 GiB/s (134,277.12 MiB/s, 140.8 GB/s, 140,799.765 MB/s, 0.128 TiB/s, 0.141 TB/s) + |
max memory channels | 6 + |
microarchitecture | Cascade Lake + |
model number | 8260M + |
name | Xeon Platinum 8260M + |
number of avx-512 execution units | 2 + |
package | FCLGA-3647 + |
part number | CD8069504201201 + |
platform | Purley + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 7,705.00 (€ 6,934.50, £ 6,241.05, ¥ 796,157.65) + |
release price (tray) | $ 7,705.00 (€ 6,934.50, £ 6,241.05, ¥ 796,157.65) + |
s-spec | SRF9J + |
series | 8200 + |
smp max ways | 8 + |
socket | Socket P + and LGA-3647 + |
supported memory type | DDR4-2933 + |
tdp | 165 W (165,000 mW, 0.221 hp, 0.165 kW) + |
technology | CMOS + |
thread count | 48 + |
turbo frequency (1 core) | 3,900 MHz (3.9 GHz, 3,900,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |