Difference between revisions of "intel/core i7/i7-7800x"

	Edit Values
	Core i7-7800X
	General Info
Designer	Intel
Manufacturer	Intel
Model Number	i7-7800X
Part Number	BX80673I77800X,; BXC80673I77800X,; CD8067303287002
S-Spec	SR3L4, SR3NH
Market	Desktop
Introduction	May 30, 2017 (announced); June 26, 2017 (launched)
Release Price	$389
Shop	Amazon
	General Specs
Family	Core i7
Series	i7-7000
Locked	No
Frequency	3,500 MHz
Turbo Frequency	Yes
Turbo Frequency	4,000 MHz (1 core)
Bus type	DMI 3.0
Bus rate	4 × 8 GT/s
Clock multiplier	35
	Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Skylake (server)
Platform	Skylake
Chipset	Lewisburg
Core Name	Skylake X
Core Family	6
Core Model	85
Core Stepping	U0, M0
Process	14 nm
Technology	CMOS
Word Size	64 bit
Cores	6
Threads	12
Max Memory	128 GiB
	Multiprocessing
Max SMP	1-Way (Uniprocessor)
	Electrical
TDP	140 W
Tjunction	0 °C – 100 °C
Tstorage	-25 °C – 125 °C
	Packaging
Package	FCLGA-2066 (LGA)
Dimension	52.5 mm × 45 mm
Pitch	1.016 mm
Contacts	2066
Socket	Socket R4
	Succession
	Core i7-9800X

Revision as of 00:03, 20 March 2019

Core i7-7800X is a 64-bit hexa-core high-performance x86 desktop microprocessor introduced by Intel in mid-2017. This chip, which is based on the Skylake microarchitecture, is fabricated on Intel's enhanced 14nm+ process. The i7-7800X operates at 3.5 GHz with a TDP of 140 W and a Turbo Boost frequency of 4 GHz. The processor supports up to 128 GiB of quad-channel DDR4-2400 memory.

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

384 KiB

393,216 B
0.375 MiB

L1I$	192 KiB 196,608 B 0.188 MiB	6x32 KiB	8-way set associative
L1D$	192 KiB 196,608 B 0.188 MiB	6x32 KiB	8-way set associative	write-back

L2$

6 MiB

6,144 KiB
6,291,456 B
0.00586 GiB

		6x1 MiB	16-way set associative	write-back

L3$

8.25 MiB

8,448 KiB
8,650,752 B
0.00806 GiB

		6x1.375 MiB	11-way set associative	write-back

Memory controller

[Edit/Modify Memory Info]

Integrated Memory Controller

Max Type	DDR4-2400
Supports ECC	No
Channels	4
Max Bandwidth	79.47 GiB/s 81,377.28 MiB/s 85.33 GB/s 85,330.263 MB/s 0.0776 TiB/s 0.0853 TB/s
Bandwidth	Single 17.88 GiB/s Double 35.76 GiB/s Quad 71.53 GiB/s

Expansions

[Edit/Modify Expansions Info]

Expansion Options

PCIe	Revision: 3.0
	Max Lanes: 28
	Configuration: 1x16+1x8+1x4, 3x8+1x4

Graphics

This processor has no integrated graphics.

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX	MMX Extension
EMMX	Extended MMX Extension
SSE	Streaming SIMD Extensions
SSE2	Streaming SIMD Extensions 2
SSE3	Streaming SIMD Extensions 3
SSSE3	Supplemental SSE3
SSE4.1	Streaming SIMD Extensions 4.1
SSE4.2	Streaming SIMD Extensions 4.2
AVX	Advanced Vector Extensions
AVX2	Advanced Vector Extensions 2
AVX-512	Advanced Vector 512-bit (2 Units)
AVX512F	AVX-512 Foundation
AVX512CD	AVX-512 Conflict Detection
AVX512BW	AVX-512 Byte and Word
AVX512DQ	AVX-512 Doubleword and Quadword Instructions
AVX512VL	AVX-512 Vector Length
ABM	Advanced Bit Manipulation
BMI1	Bit Manipulation Instruction Set 1
BMI2	Bit Manipulation Instruction Set 2
FMA3	3-Operand Fused-Multiply-Add
AES	AES Encryption Instructions
RdRand	Hardware RNG
ADX	Multi-Precision Add-Carry
CLMUL	Carry-less Multiplication Extension
F16C	16-bit Floating Point Conversion

x86-16	16-bit x86
x86-32	32-bit x86
x86-64	64-bit x86
Real	Real Mode
Protected	Protected Mode
SMM	System Management Mode
FPU	Integrated x87 FPU
NX	No-eXecute
HT	Hyper-Threading
TBT 2.0	Turbo Boost Technology 2.0
EIST	Enhanced SpeedStep Technology
VT-x	VT-x (Virtualization)
VT-d	VT-d (I/O MMU virtualization)
EPT	Extended Page Tables (SLAT)
TSX	Transactional Synchronization Extensions

Frequencies

See also: Intel's CPU Frequency Behavior

[Modify Frequency Info]

Mode	Base	Turbo Frequency/Active Cores
Mode	Base	1	2	3	4	5	6
Normal	4.7	4,000 MHz	4,000 MHz	4,000 MHz	4,000 MHz	4,000 MHz	4,000 MHz
AVX2	3
AVX512	3

@@ Line 204: / Line 204: @@
 {{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}}
 {{frequency table
-|freq_base=3,500 MHz
+|freq_base=4.7
 |freq_1=4,000 MHz
 |freq_2=4,000 MHz
@@ Line 211: / Line 211: @@
 |freq_5=4,000 MHz
 |freq_6=4,000 MHz
+|freq_avx2_base=3
+|freq_avx512_base=3
 }}

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Core i7-7800X - Intel#pcie +
base frequency	3,500 MHz (3.5 GHz, 3,500,000 kHz) +
bus links	4 +
bus rate	8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus type	DMI 3.0 +
chipset	Lewisburg +
clock multiplier	35 +
core count	6 +
core family	6 +
core model	85 +
core name	Skylake X +
core stepping	U0 + and M0 +
designer	Intel +
family	Core i7 +
first announced	May 30, 2017 +
first launched	June 26, 2017 +
full page name	intel/core i7/i7-7800x +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has advanced vector extensions 512	true +
has ecc memory support	false +
has extended page tables support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions +
has intel enhanced speedstep technology	true +
has intel turbo boost technology 2 0	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	false +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	384 KiB (393,216 B, 0.375 MiB) +
l1d$ description	8-way set associative +
l1d$ size	192 KiB (196,608 B, 0.188 MiB) +
l1i$ description	8-way set associative +
l1i$ size	192 KiB (196,608 B, 0.188 MiB) +
l2$ description	16-way set associative +
l2$ size	6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) +
l3$ description	11-way set associative +
l3$ size	8.25 MiB (8,448 KiB, 8,650,752 B, 0.00806 GiB) +
ldate	June 26, 2017 +
main image	+
manufacturer	Intel +
market segment	Desktop +
max cpu count	1 +
max junction temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory	131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory bandwidth	79.47 GiB/s (81,377.28 MiB/s, 85.33 GB/s, 85,330.263 MB/s, 0.0776 TiB/s, 0.0853 TB/s) +
max memory channels	4 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Skylake (server) +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	i7-7800X +
name	Core i7-7800X +
number of avx-512 execution units	2 +
package	FCLGA-2066 +
part number	BX80673I77800X +, BXC80673I77800X + and CD8067303287002 +
platform	Skylake +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 389.00 (€ 350.10, £ 315.09, ¥ 40,195.37) +
s-spec	SR3L4 + and SR3NH +
series	i7-7000 +
smp max ways	1 +
socket	Socket R4 +
supported memory type	DDR4-2400 +
tdp	140 W (140,000 mW, 0.188 hp, 0.14 kW) +
technology	CMOS +
thread count	12 +
turbo frequency (1 core)	4,000 MHz (4 GHz, 4,000,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +

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