Revision as of 22:22, 6 December 2018

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Snapdragon 8cx
General Info
Designer	Qualcomm, ARM Holdings
Manufacturer	TSMC
Market	Mobile
Introduction	December 6, 2018 (announced) Q3, 2019 (launched)
General Specs
Family	Snapdragon 800
Series	800
Microarchitecture
ISA	ARMv8 (ARM)
Microarchitecture	Cortex-A76, Cortex-A55
Core Name	Cortex-A76, Cortex-A55
Process	7 nm
Technology	CMOS
Word Size	64 bit
Cores	8
Threads	8
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Electrical
TDP	7 W
Packaging
Succession
Snapdragon 850

Snapdragon 8cx (Snapdragon 8 Compute eXtreme) is a high-performance 64-bit ARM LTE system on a chip designed by Qualcomm and introduced in late 2018. Fabricated on TSMC's 7nm process, the 8cx features four Kryo 495 Silver high-efficiency cores operating at ? GHz along with two high-performance Kryo 495 Gold operating at ? GHz. The Snapdragon 8cx integrates the Adreno 680 GPU operation at ? MHz and features an X24 LTE modem supporting Cat 20 uplink and Cat 20 downlink. This chip supports up to ? GiB of octa-channel LPDDR4X-4266 memory.

Overview

Block Diagram

The Snapdragon 8cx was announced by Qualcomm on December 6, 2018. The chip is what Qualcomm considers a new high tier Snapdragon aimed at always-connected PCs with higher performance and thermal headroom over traditional smartphone devices. The chip comprise of a quad-core cluster of Kryo 495 Gold (Cortex-A76) big cores and a quad-core cluster of Kryo 495 Silver (Cortex-A55) little cores.

Cache

Main articles: Cortex-A76 § Cache and Cortex-A55

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L3$ 10 MiB 10,240 KiB 10,485,760 B 0.00977 GiB     1x10 MiB

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type LPDDR4X-4266 Supports ECC No Max Mem ? GiB Frequency 2133 MHz Controllers 1 Channels 8 Width 16 bit Max Bandwidth 29.87 GiB/s 30,586.88 MiB/s 32.073 GB/s 32,072.668 MB/s 0.0292 TiB/s 0.0321 TB/s Bandwidth Single 7.95 GiB/s Double 15.89 GiB/s Quad 31.79 GiB/s Octa 63.58 GiB/s