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Difference between revisions of "movidius/sabre"
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{{movidius title|SABRE}} | {{movidius title|SABRE}} | ||
| − | {{chip}} | + | {{chip |
| − | '''SABRE''' was a test microprocessor designed by [[Movidius]] for the [[acceleration]] of machine vision. The SABRE microprocessor eventually lead to the production definition of the {{movidius|Myriad|Myriad 1}} line of vision accelerators. SABRE is capable of 20 GLOPS at low 100s mW of power through the use of 9 execution units consisting of a [[SPARC]] {{sparc|V8}} [[LEON3]] core and 8 additional {{movidius|SHAVE v2.0|l=arch}} cores. | + | |name=SABRE |
| + | |no image=Yes | ||
| + | |designer=Movidius | ||
| + | |manufacturer=TSMC | ||
| + | |model number=SABRE | ||
| + | |market=Embedded | ||
| + | |market 2=Mobile | ||
| + | |frequency=180 MHz | ||
| + | |isa=SPARC V8 | ||
| + | |isa family=SPARC | ||
| + | |isa 2=SHAVE | ||
| + | |isa 2 family=SHAVE | ||
| + | |microarch=LEON3 | ||
| + | |microarch 2=SHAVE v2.0 | ||
| + | |process=65 nm | ||
| + | |technology=CMOS | ||
| + | |word size=32 bit | ||
| + | |core count=9 | ||
| + | |thread count=9 | ||
| + | }} | ||
| + | '''SABRE''' was a test microprocessor designed by [[Movidius]] for the [[acceleration]] of machine vision. SABRE was a modification of the original {{\\|ISAAC}} designed back in 2007 as a game physics accelerator. The SABRE microprocessor eventually lead to the production definition of the {{movidius|Myriad|Myriad 1}} line of vision accelerators. | ||
| + | |||
| + | == Overview == | ||
| + | SABRE is capable of 20 GLOPS at low 100s mW of power through the use of 9 execution units consisting of a [[SPARC]] {{sparc|V8}} [[LEON3]] core and 8 additional {{movidius|SHAVE v2.0|l=arch}} cores. | ||
The test platform consisted of a [[Samsung]] 6410 [[daughtercard]] which incoluded an [[S3C6410X]] processor ([[ARM11]]) and a Movidius MV0108 SABRE daughtercard which had the SABRE processor. | The test platform consisted of a [[Samsung]] 6410 [[daughtercard]] which incoluded an [[S3C6410X]] processor ([[ARM11]]) and a Movidius MV0108 SABRE daughtercard which had the SABRE processor. | ||
| + | |||
| + | [[File:movidius sabre test board.png|500px]] | ||
| + | |||
| + | == Block diagram == | ||
| + | :[[File:movidius sabre block diagram.png|500px]] | ||
| + | |||
| + | == References == | ||
| + | * Tite, Teodor, et al. "moviOS: a Real-Time Multiprocessor Operating System for Multimedia Applications." | ||
| + | * [https://www.movidius.com/news/happy-10th-birthday-movidius Happy 10th Birthday Movidius] | ||
Latest revision as of 10:31, 11 March 2018
| Edit Values | |
| SABRE | |
| General Info | |
| Designer | Movidius |
| Manufacturer | TSMC |
| Model Number | SABRE |
| Market | Embedded, Mobile |
| General Specs | |
| Frequency | 180 MHz |
| Microarchitecture | |
| ISA | SPARC V8 (SPARC), SHAVE (SHAVE) |
| Microarchitecture | LEON3, SHAVE v2.0 |
| Process | 65 nm |
| Technology | CMOS |
| Word Size | 32 bit |
| Cores | 9 |
| Threads | 9 |
SABRE was a test microprocessor designed by Movidius for the acceleration of machine vision. SABRE was a modification of the original ISAAC designed back in 2007 as a game physics accelerator. The SABRE microprocessor eventually lead to the production definition of the Myriad 1 line of vision accelerators.
Overview[edit]
SABRE is capable of 20 GLOPS at low 100s mW of power through the use of 9 execution units consisting of a SPARC V8 LEON3 core and 8 additional SHAVE v2.0 cores.
The test platform consisted of a Samsung 6410 daughtercard which incoluded an S3C6410X processor (ARM11) and a Movidius MV0108 SABRE daughtercard which had the SABRE processor.
Block diagram[edit]
References[edit]
- Tite, Teodor, et al. "moviOS: a Real-Time Multiprocessor Operating System for Multimedia Applications."
- Happy 10th Birthday Movidius
Facts about "SABRE - Intel Movidius"
| full page name | movidius/sabre + |
| instance of | microprocessor + |
| ldate | 1900 + |