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Difference between revisions of "centaur/microarchitectures/samuel"
(Created page with "{{centtech title|Samuel|arch}} {{microarchitecture}} '''Samuel''' was an x86 microarchitecture designed by Centaur Technology. VIA replaced Cyri...") |
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{{centtech title|Samuel|arch}} | {{centtech title|Samuel|arch}} | ||
| − | {{microarchitecture}} | + | {{microarchitecture |
| + | |atype=CPU | ||
| + | |name=Samuel | ||
| + | |designer=Centaur Technology | ||
| + | |manufacturer=TSMC | ||
| + | |process=0.180 µm | ||
| + | |cores=1 | ||
| + | |stages=12 | ||
| + | |isa=x86-32 | ||
| + | |predecessor=Joshua | ||
| + | |predecessor link=cyrix/microarchitectures/joshua | ||
| + | |successor=Samuel 2 | ||
| + | |successor link=centaur/microarchitectures/samuel 2 | ||
| + | }} | ||
'''Samuel''' was an [[x86]] microarchitecture designed by [[Centaur Technology]]. [[VIA Technologies|VIA]] replaced [[Cyrix]]'s {{cyrix|Joshua|l=arch}} architecture with Samuel prior to mass production after failing to meet performance goals. | '''Samuel''' was an [[x86]] microarchitecture designed by [[Centaur Technology]]. [[VIA Technologies|VIA]] replaced [[Cyrix]]'s {{cyrix|Joshua|l=arch}} architecture with Samuel prior to mass production after failing to meet performance goals. | ||
Revision as of 22:04, 14 January 2018
| Edit Values | |
| Samuel µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Centaur Technology |
| Manufacturer | TSMC |
| Process | 0.180 µm |
| Core Configs | 1 |
| Pipeline | |
| Stages | 12 |
| Instructions | |
| ISA | x86-32 |
| Succession | |
Samuel was an x86 microarchitecture designed by Centaur Technology. VIA replaced Cyrix's Joshua architecture with Samuel prior to mass production after failing to meet performance goals.
Facts about "Samuel - Microarchitectures - Centaur Technology"
| codename | Samuel + |
| core count | 1 + |
| designer | Centaur Technology + |
| full page name | centaur/microarchitectures/samuel + |
| instance of | microarchitecture + |
| instruction set architecture | x86-32 + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Samuel + |
| pipeline stages | 12 + |
| process | 180 nm (0.18 μm, 1.8e-4 mm) + |