From WikiChip
Difference between revisions of "nervana/microarchitectures/lake crest"
< nervana

(lake crest)
 
Line 1: Line 1:
 
{{nervana title|Lake Crest|arch}}
 
{{nervana title|Lake Crest|arch}}
−
{{microarchitecture}}
+
{{microarchitecture
 +
|atype=NPU
 +
|name=Lake Crest
 +
|designer=Nervana
 +
|manufacturer=TSMC
 +
|process=28 nm
 +
|successor=Springs Crest
 +
|successor link=nervana/microarchitectures/spring crest
 +
}}
 
'''Lake Crest''' is a [[neural processor]] microarchitecture designed by [[Nervana]].
 
'''Lake Crest''' is a [[neural processor]] microarchitecture designed by [[Nervana]].

Revision as of 00:52, 29 December 2017

Edit Values
Lake Crest µarch
General Info
Arch TypeNPU
DesignerNervana
ManufacturerTSMC
Process28 nm
Succession

Lake Crest is a neural processor microarchitecture designed by Nervana.

Retrieved from "https://en.wikichip.org/w/index.php?title=nervana/microarchitectures/lake_crest&oldid=71729"
Facts about "Lake Crest - Microarchitectures - Intel Nervana"
RDF feed
codenameLake Crest +
designerNervana +
full page namenervana/microarchitectures/lake crest +
instance ofmicroarchitecture +
manufacturerTSMC +
nameLake Crest +
process28 nm (0.028 μm, 2.8e-5 mm) +