Latest revision as of 15:31, 13 December 2017

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Godson-2C
Godson-2C chip
General Info
Designer	Loongson
Manufacturer	SMICS
Model Number	2C
Part Number	DXP100
Market	Desktop
Introduction	2004 (announced) September 28, 2004 (launched)
General Specs
Family	Godson 2
Series	Godson 2
Frequency	500 MHz
Microarchitecture
ISA	MIPS64 (MIPS)
Microarchitecture	GS464
Core Name	GS464
Process	180 nm
Transistors	13,500,000
Technology	CMOS
Die	41.54 mm² 6,200 µm × 6,700 µm
Word Size	64 bit
Cores	1
Threads	1
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Electrical
Power dissipation	5 W

Godson-2C (龙芯2C) is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. Introduced in late 2004, the Godson-2C operates at up to 500 MHz consuming 3-5W. This chip was manufactured on SMICS' 0.18 µm process. This chip reached tapeout on June 8, 2004.

The Godson-2C provides roughly three times the performance of 2B. The 2C has twice the cache and almost twice the frequency as the 2B, along with an improved branch predictor.

Loongson has claimed the Godson-2C has reached the performance level of 500-800 MHz PIII based on their SPECint2000 scores.

Cache[edit]

Main article: GS464 § Cache

This chip was typically combined with 1 MiB - 8 MiB L2 cache off-die (on the motherboard).

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 128 KiB 131,072 B 0.125 MiB L1I$ 64 KiB 65,536 B 0.0625 MiB 1x64 KiB 4-way set associative   L1D$ 64 KiB 65,536 B 0.0625 MiB 1x64 KiB 4-way set associative

References[edit]

• Hu, Wei-Wu, and Jian Wang. "Making effective decisions in computer architects’ real-world: Lessons and experiences with Godson-2 processor designs." Journal of Computer Science and Technology 23.4 (2008): 620-632.