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{{intel title|Atom Z670}}
 
{{intel title|Atom Z670}}
−
{{mpu
+
{{chip
 
| name                = Atom Z670
 
| name                = Atom Z670
−
| no image            = Yes
+
| image              = lincroft chips.png
−
| image              =  
+
| image size          = 250px
−
| image size          =  
 
 
| caption            =  
 
| caption            =  
 
| designer            = Intel
 
| designer            = Intel
Line 10: Line 9:
 
| model number        = Z670
 
| model number        = Z670
 
| part number        = AY80609007293AA
 
| part number        = AY80609007293AA
−
| part number 1      =
 
 
| part number 2      =  
 
| part number 2      =  
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| s-spec              = SLC2P
 
| s-spec              = SLC2P
 
| s-spec 2            =  
 
| s-spec 2            =  
Line 20: Line 19:
 
| first announced    = April 11, 2011
 
| first announced    = April 11, 2011
 
| first launched      = April 11, 2011
 
| first launched      = April 11, 2011
−
| last order          =  
+
| last order          = May 31, 2013
−
| last shipment      =  
+
| last shipment      = November 08, 2013
 
| release price      = $75
 
| release price      = $75
  
Line 59: Line 58:
 
| max memory          = 2 GiB
 
| max memory          = 2 GiB
  
−
| electrical          = Yes
+
 
 
| power              =  
 
| power              =  
 
| average power      =  
 
| average power      =  
Line 72: Line 71:
 
| v io 3              =  
 
| v io 3              =  
 
| sdp                =  
 
| sdp                =  
−
| tdp                =  
+
| tdp                = 3 W
 
| tdp typical        =  
 
| tdp typical        =  
 
| ctdp down          =  
 
| ctdp down          =  
Line 80: Line 79:
 
| tjunc min          = 0 °C
 
| tjunc min          = 0 °C
 
| tjunc max          = 90 °C
 
| tjunc max          = 90 °C
−
| tcase min          =  
+
| tcase min          = 0 °C
−
| tcase max          =  
+
| tcase max          = 70 °C
 
| tstorage min        = -55 °C
 
| tstorage min        = -55 °C
 
| tstorage max        = 125 °C
 
| tstorage max        = 125 °C
Line 89: Line 88:
 
| package module 1    = {{packages/intel/fcbga-518}}
 
| package module 1    = {{packages/intel/fcbga-518}}
 
}}
 
}}
 +
'''Atom Z670''' is an ultra-low power {{arch|32}} [[x86]] system on a chip designed by [[Intel]] and introduced in mid-[[2011]]. The Z670, which is based on the {{intel|Bonnell|l=arch}} microarchitecture ({{intel|Lincroft|l=core}} core), is fabricated on a [[45 nm process]]. This SoC incorporates a single core operating at 1.5 GHz with a low frequency mode of 600 MHz. The chip has a TDP of 3 W and supporting up to a 2 GiB of single-channel DDR2-800 memory. Additionally, the Z670 incorporates a {{imgtec|PowerVR SGX 535|GMA 600}} [[IGP]] operating at 400 MHz.
 +
 +
This chip communicates with the [[southbridge]] chipset (PCH MP30) over two buses: cDMI and cDVO. Both buses go from the SoC to the chipset. cDMI, which is used as the data interface link, operates at 100 MHz using a quad-pumped rate (i.e. 400 MT/s). That bus is composed of an 8-bit transmit and 8-bit receive. The cDVO, which is used as a unidirectional display data link is a quad-pumped 6-bit bus operating 200 MHz for a 800 MT/s effective rate. This model uses a [[GTL|AGTL+]] signaling bus for this.
 +
 +
== Cache ==
 +
{{main|intel/microarchitectures/bonnell#Memory_Hierarchy|l1=Bonnell § Cache}}
 +
{{cache size
 +
|l1 cache=56 KiB
 +
|l1i cache=32 KiB
 +
|l1i break=1x32 KiB
 +
|l1i desc=8-way set associative
 +
|l1d cache=24 KiB
 +
|l1d break=1x24 KiB
 +
|l1d desc=6-way set associative
 +
|l1d policy=write-back
 +
|l2 cache=512 KiB
 +
|l2 break=1x512 KiB
 +
|l2 desc=8-way set associative
 +
}}
 +
 +
== Memory controller ==
 +
{{memory controller
 +
|type=DDR-400
 +
|type 2=DDR2-800
 +
|ecc=No
 +
|max mem=2 GiB
 +
|controllers=1
 +
|channels=1
 +
|width=32 bit
 +
|max bandwidth=2.98 GiB/s
 +
|bandwidth schan=2.98 GiB/s
 +
|pae=32 bit
 +
}}
 +
 +
== Expansions ==
 +
{{expansions
 +
| usb revision      = 2.0
 +
| usb ports          = 4
 +
| uart              = Yes
 +
| gp io              = Yes
 +
}}
 +
 +
== Graphics ==
 +
This chip incroporates the "GMA 600" integrated graphics which is actually a re-branded licensed [[Imagination Technologies|Imagination]] {{imgtec|PowerVR SGX 535}} [[IGP]].
 +
{{integrated graphics
 +
| gpu                = PowerVR SGX535
 +
| device id          =
 +
| designer            = Imagination Technologies
 +
| execution units    =
 +
| max displays        = 1
 +
| max memory          = 256 MiB
 +
| frequency          = 400 MHz
 +
 +
| output lvds        = Yes
 +
 +
| max res lvds        = 1366x768
 +
 +
| direct3d ver        = 9.0c
 +
| opengl ver          = 2.1
 +
| openvg ver          = 1.1
 +
| opengl es ver      = 1.1
 +
| opengl es ver 2    = 2.0
 +
 +
| features            = Yes
 +
| intel clear video  = Yes
 +
}}
 +
 +
* Supports hardware-accelerated HD video decode (MPEG4 part 2, H.264, WMV, and VC1)
 +
* Supports hardware-accelerated HD video encode (MPEG4 part 2 and H.264)
 +
 +
== Features ==
 +
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=No
 +
|sse42=No
 +
|sse4a=No
 +
|avx=No
 +
|avx2=No
 +
 +
|abm=No
 +
|tbm=No
 +
|bmi1=No
 +
|bmi2=No
 +
|fma3=No
 +
|fma4=No
 +
|aes=No
 +
|rdrand=No
 +
|sha=No
 +
|xop=No
 +
|adx=No
 +
|clmul=No
 +
|f16c=No
 +
|tbt1=No
 +
|tbt2=No
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=No
 +
|fastmem=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=No
 +
|txt=No
 +
|ht=Yes
 +
|vpro=No
 +
|vtx=No
 +
|vtd=No
 +
|ept=No
 +
|mpx=No
 +
|sgx=No
 +
|securekey=No
 +
|osguard=No
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 +
}}
 +
 +
== Die Shot ==
 +
{{see also|intel/microarchitectures/bonnell#Lincroft|l1=Bonnell § Lincroft Die}}
 +
* [[45 nm process]]
 +
 +
[[File:lincroft oak trail die shot.png|500px]]
 +
 +
== Documents ==
 +
=== Datasheet ===
 +
* [[:File:atom-z670-datasheet.pdf|Atom Z670 Datasheet]], April 2011
 +
* [[:File:atom-z670-specification-update.pdf|Atom Z670 Specs Update]], July 2014
 +
=== Manuals ===
 +
* [[:File:atom-z670-z650-sm35-chipset-bios-appl-note.pdf|Atom Z670/Z650 with Intel SM35 Express Chipset-Based Platform BIOS Development Vendors and Contacts]], November 2011
 +
* [[:File:z670-z650-sm35-express-chipset-paper.pdf|Atom Processor Z670/Z650 and Intel SM35 Express Chipset Based Platform Video Decoding Results and Recommendations]], June 2012

Latest revision as of 15:15, 13 December 2017

Edit Values
Atom Z670
lincroft chips.png
General Info
DesignerIntel
ManufacturerIntel
Model NumberZ670
Part NumberAY80609007293AA
S-SpecSLC2P
MarketMobile
IntroductionApril 11, 2011 (announced)
April 11, 2011 (launched)
End-of-lifeMay 31, 2013 (last order)
November 08, 2013 (last shipment)
Release Price$75
ShopAmazon
General Specs
FamilyAtom
SeriesZ650
LockedYes
Frequency1,500 MHz
Bus typecDMI
Bus speed100 MHz
Bus rate400 MT/s
Clock multiplier8
CPUID20661
Microarchitecture
ISAx86-32 (x86)
MicroarchitectureBonnell
PlatformOak Trail
ChipsetLangwell
Core NameLincroft
Core Family6
Core Model38
Core Stepping1
Process45 nm
TechnologyCMOS
Word Size32 bit
Cores1
Threads2
Max Memory2 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore0.7 V-1.15 V
TDP3 W
Tjunction0 °C – 90 °C
Tcase0 °C – 70 °C
Tstorage-55 °C – 125 °C
Packaging
PackageFCBGA-518 (FCBGA)
Dimension13.8 mm x 13.8 mm x 1.1 mm
Pin Count518
SocketBGA-518 (BGA)

Atom Z670 is an ultra-low power 32-bit x86 system on a chip designed by Intel and introduced in mid-2011. The Z670, which is based on the Bonnell microarchitecture (Lincroft core), is fabricated on a 45 nm process. This SoC incorporates a single core operating at 1.5 GHz with a low frequency mode of 600 MHz. The chip has a TDP of 3 W and supporting up to a 2 GiB of single-channel DDR2-800 memory. Additionally, the Z670 incorporates a GMA 600 IGP operating at 400 MHz.

This chip communicates with the southbridge chipset (PCH MP30) over two buses: cDMI and cDVO. Both buses go from the SoC to the chipset. cDMI, which is used as the data interface link, operates at 100 MHz using a quad-pumped rate (i.e. 400 MT/s). That bus is composed of an 8-bit transmit and 8-bit receive. The cDVO, which is used as a unidirectional display data link is a quad-pumped 6-bit bus operating 200 MHz for a 800 MT/s effective rate. This model uses a AGTL+ signaling bus for this.

Cache[edit]

Main article: Bonnell § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$56 KiB
57,344 B
0.0547 MiB
L1I$32 KiB
32,768 B
0.0313 MiB
1x32 KiB8-way set associative 
L1D$24 KiB
24,576 B
0.0234 MiB
1x24 KiB6-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  1x512 KiB8-way set associative 

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR-400, DDR2-800
Supports ECCNo
Max Mem2 GiB
Controllers1
Channels1
Width32 bit
Max Bandwidth2.98 GiB/s
3,051.52 MiB/s
3.2 GB/s
3,199.751 MB/s
0.00291 TiB/s
0.0032 TB/s
Bandwidth
Single 2.98 GiB/s
Physical Address (PAE)32 bit

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
USB
Revision2.0
Ports4
UART
GP I/OYes


Graphics[edit]

This chip incroporates the "GMA 600" integrated graphics which is actually a re-branded licensed Imagination PowerVR SGX 535 IGP.

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUPowerVR SGX535
DesignerImagination Technologies
Max Displays1
Max Memory256 MiB
262,144 KiB
268,435,456 B
0.25 GiB
Frequency400 MHz
0.4 GHz
400,000 KHz
OutputLVDS
Max Resolution
LVDS1366x768
Standards
Direct3D9.0c
OpenGL2.1
OpenGL ES1.1, 2.0
OpenVG1.1
Additional Features
Intel Clear Video
  • Supports hardware-accelerated HD video decode (MPEG4 part 2, H.264, WMV, and VC1)
  • Supports hardware-accelerated HD video encode (MPEG4 part 2 and H.264)

Features[edit]

Die Shot[edit]

See also: Bonnell § Lincroft Die

lincroft oak trail die shot.png

Documents[edit]

Datasheet[edit]

Manuals[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/atom/z670&oldid=70416"
Facts about "Atom Z670 - Intel"
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Atom Z670 - Intel#package +
base frequency1,500 MHz (1.5 GHz, 1,500,000 kHz) +
bus rate400 MT/s (0.4 GT/s, 400,000 kT/s) +
bus speed100 MHz (0.1 GHz, 100,000 kHz) +
bus typecDMI +
chipsetLangwell +
clock multiplier8 +
core count1 +
core family6 +
core model38 +
core nameLincroft +
core stepping1 +
core voltage (max)1.15 V (11.5 dV, 115 cV, 1,150 mV) +
core voltage (min)0.7 V (7 dV, 70 cV, 700 mV) +
cpuid20661 +
designerIntel +
familyAtom +
first announcedApril 11, 2011 +
first launchedApril 11, 2011 +
full page nameintel/atom/z670 +
has ecc memory supportfalse +
has featureHyper-Threading Technology + and Enhanced SpeedStep Technology +
has intel enhanced speedstep technologytrue +
has locked clock multipliertrue +
has simultaneous multithreadingtrue +
instance ofmicroprocessor +
integrated gpuPowerVR SGX535 +
integrated gpu base frequency400 MHz (0.4 GHz, 400,000 KHz) +
integrated gpu designerImagination Technologies +
integrated gpu max memory256 MiB (262,144 KiB, 268,435,456 B, 0.25 GiB) +
isax86-32 +
isa familyx86 +
l1$ size56 KiB (57,344 B, 0.0547 MiB) +
l1d$ description6-way set associative +
l1d$ size24 KiB (24,576 B, 0.0234 MiB) +
l1i$ description8-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
last orderMay 31, 2013 +
last shipmentNovember 8, 2013 +
ldateApril 11, 2011 +
main imageFile:lincroft chips.png +
manufacturerIntel +
market segmentMobile +
max case temperature343.15 K (70 °C, 158 °F, 617.67 °R) +
max cpu count1 +
max junction temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max memory2,048 MiB (2,097,152 KiB, 2,147,483,648 B, 2 GiB, 0.00195 TiB) +
max memory bandwidth2.98 GiB/s (3,051.52 MiB/s, 3.2 GB/s, 3,199.751 MB/s, 0.00291 TiB/s, 0.0032 TB/s) +
max memory channels1 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureBonnell +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature218.15 K (-55 °C, -67 °F, 392.67 °R) +
model numberZ670 +
nameAtom Z670 +
packageFCBGA-518 +
part numberAY80609007293AA +
platformOak Trail +
process45 nm (0.045 μm, 4.5e-5 mm) +
release price$ 75.00 (€ 67.50, £ 60.75, ¥ 7,749.75) +
s-specSLC2P +
seriesZ650 +
smp max ways1 +
socketBGA-518 +
supported memory typeDDR-400 + and DDR2-800 +
tdp3 W (3,000 mW, 0.00402 hp, 0.003 kW) +
technologyCMOS +
thread count2 +
word size32 bit (4 octets, 8 nibbles) +