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Difference between revisions of "amd/athlon mp/ahx1000ams3c"
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{{amd title|Athlon MP 1000}} | {{amd title|Athlon MP 1000}} | ||
− | {{ | + | {{chip |
| name = AMD Athlon MP 1000 | | name = AMD Athlon MP 1000 | ||
| no image = yes | | no image = yes | ||
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| max memory = 4 GiB | | max memory = 4 GiB | ||
− | + | ||
| v core = 1.75 V | | v core = 1.75 V | ||
| v core tolerance = | | v core tolerance = | ||
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| socket 0 type = PGA-462 | | socket 0 type = PGA-462 | ||
}} | }} | ||
− | '''Athlon MP 1000''' (OPN ''AHX1000AMS3C'') based on the {{amd|Palomino|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in [[2001]] for the server and workstation market. The MP 1000 was AMD's first dual-socket microprocessor (along with the {{\\|AHX1200AMS3C|1200}}). This model operated at 1 | + | '''Athlon MP 1000''' (OPN ''AHX1000AMS3C'') based on the {{amd|Palomino|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in [[2001]] for the server and workstation market. The MP 1000 was AMD's first dual-socket microprocessor (along with the {{\\|AHX1200AMS3C|1200}}). This model operated at 1 GHz with a FSB transfer rate of 266 MT/s with a typical TDP of 41.3 W. This processor, which was based on the {{amd|K7|K7 microarchitecture|l=arch}}, was manufactured on a mature [[180 nm]] copper interconnect technology at AMD's Fab 30 in Dresden, Germany. |
+ | |||
+ | == Cache == | ||
+ | {{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}} | ||
+ | {{cache size | ||
+ | |l1 cache=128 KiB | ||
+ | |l1i cache=64 KiB | ||
+ | |l1i break=1x64 KiB | ||
+ | |l1i desc=2-way set associative | ||
+ | |l1i policy= | ||
+ | |l1d cache=64 KiB | ||
+ | |l1d break=1x64 KiB | ||
+ | |l1d desc=2-way set associative | ||
+ | |l1d policy= | ||
+ | |l2 cache=256 KiB | ||
+ | |l2 break=1x256 KiB | ||
+ | |l2 desc=16-way set associative | ||
+ | |l2 policy= | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | This MPU has no integrated graphics processing unit. | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=No | ||
+ | |nx=No | ||
+ | |3dnow=Yes | ||
+ | |e3dnow=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=No | ||
+ | |sse3=No | ||
+ | |ssse3=No | ||
+ | |sse41=No | ||
+ | |sse42=No | ||
+ | |sse4a=No | ||
+ | |avx=No | ||
+ | |avx2=No | ||
+ | |||
+ | |abm=No | ||
+ | |tbm=No | ||
+ | |bmi1=No | ||
+ | |bmi2=No | ||
+ | |fma3=No | ||
+ | |fma4=No | ||
+ | |aes=No | ||
+ | |rdrand=No | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=No | ||
+ | |clmul=No | ||
+ | |f16c=No | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=No | ||
+ | |flex=No | ||
+ | |isrt=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=No | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=No | ||
+ | |vtd=No | ||
+ | |ept=No | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |smartmp=Yes | ||
+ | |powernow=No | ||
+ | |amdv=No | ||
+ | |rvi=No | ||
+ | }} | ||
+ | * Advanced Configuration and Power Interface [[has feature::ACPI| ]] | ||
+ | ** [[has feature::Halt State]] | ||
+ | ** [[has feature::Stop Grant State]] | ||
+ | |||
+ | == Documents == | ||
+ | === Datasheets === | ||
+ | * [[:File:AMD Athlon MP Processor Model 6 Data Sheet.pdf|AMD Athlon MP Processor Model 6 Data Sheet Multiprocessor-Capable for Workstation and Server Platforms]]; Publication # 24685; Rev.: B; Issue Date: June 2001. | ||
+ | === Others === | ||
+ | * [[:File:System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002. |
Latest revision as of 15:20, 13 December 2017
Edit Values | |
AMD Athlon MP 1000 | |
General Info | |
Designer | AMD |
Manufacturer | AMD |
Model Number | Athlon MP 1000 |
Part Number | AHX1000AMS3C |
Market | Server |
Introduction | June 5, 2001 (announced) June 5, 2001 (launched) |
Release Price | $215 |
Shop | Amazon |
General Specs | |
Family | Athlon MP |
Locked | Yes |
Frequency | 1000 MHz |
Bus type | FSB |
Bus speed | 133 MHz |
Bus rate | 266 MT/s |
Clock multiplier | 7.5 |
CPUID | 662 |
Microarchitecture | |
Microarchitecture | K7 |
Platform | Athlon MP |
Chipset | AMD-760MP |
Core Name | Palomino |
Core Family | 6 |
Core Model | 6 |
Core Stepping | 2 |
Process | 180 nm |
Transistors | 37,500,000 |
Technology | CMOS |
Die | 128 mm² |
Word Size | 32 bit |
Cores | 1 |
Threads | 1 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 2-Way (Multiprocessor) |
Electrical | |
Vcore | 1.75 V |
TDP | 46.1 W |
TDP (Typical) | 41.3 W |
Tjunction | 0 °C – 95 °C |
Tcase | 0 °C – 95 °C |
Tstorage | -40 °C – 100 °C |
Athlon MP 1000 (OPN AHX1000AMS3C) based on the Palomino core was a 32-bit x86 multiprocessor developed by AMD and introduced in 2001 for the server and workstation market. The MP 1000 was AMD's first dual-socket microprocessor (along with the 1200). This model operated at 1 GHz with a FSB transfer rate of 266 MT/s with a typical TDP of 41.3 W. This processor, which was based on the K7 microarchitecture, was manufactured on a mature 180 nm copper interconnect technology at AMD's Fab 30 in Dresden, Germany.
Cache[edit]
- Main article: K7 § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Graphics[edit]
This MPU has no integrated graphics processing unit.
Features[edit]
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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- Advanced Configuration and Power Interface
- Halt State
- Stop Grant State
Documents[edit]
Datasheets[edit]
- AMD Athlon MP Processor Model 6 Data Sheet Multiprocessor-Capable for Workstation and Server Platforms; Publication # 24685; Rev.: B; Issue Date: June 2001.
Others[edit]
- System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors; Publication # 25325; Rev: B; August 2002.
Facts about "Athlon MP 1000 - AMD"
base frequency | 1,000 MHz (1 GHz, 1,000,000 kHz) + |
bus rate | 266 MT/s (0.266 GT/s, 266,000 kT/s) + |
bus speed | 133 MHz (0.133 GHz, 133,000 kHz) + |
bus type | FSB + |
chipset | AMD-760MP + |
clock multiplier | 7.5 + |
core count | 1 + |
core family | 6 + |
core model | 6 + |
core name | Palomino + |
core stepping | 2 + |
core voltage | 1.75 V (17.5 dV, 175 cV, 1,750 mV) + |
cpuid | 662 + |
designer | AMD + |
die area | 128 mm² (0.198 in², 1.28 cm², 128,000,000 µm²) + |
family | Athlon MP + |
first announced | June 5, 2001 + |
first launched | June 5, 2001 + |
full page name | amd/athlon mp/ahx1000ams3c + |
has amd smartmp technology | true + |
has feature | SmartMP Technology +, ACPI +, Halt State + and Stop Grant State + |
has locked clock multiplier | true + |
has multiprocessing support | true + |
instance of | microprocessor + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 2-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 2-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) + |
ldate | June 5, 2001 + |
manufacturer | AMD + |
market segment | Server + |
max case temperature | 368.15 K (95 °C, 203 °F, 662.67 °R) + |
max cpu count | 2 + |
max junction temperature | 368.15 K (95 °C, 203 °F, 662.67 °R) + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
max storage temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
microarchitecture | K7 + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 233.15 K (-40 °C, -40 °F, 419.67 °R) + |
model number | Athlon MP 1000 + |
name | AMD Athlon MP 1000 + |
part number | AHX1000AMS3C + |
platform | Athlon MP + |
process | 180 nm (0.18 μm, 1.8e-4 mm) + |
release price | $ 215.00 (€ 193.50, £ 174.15, ¥ 22,215.95) + |
smp max ways | 2 + |
tdp | 46.1 W (46,100 mW, 0.0618 hp, 0.0461 kW) + |
tdp (typical) | 41.3 W (41,300 mW, 0.0554 hp, 0.0413 kW) + |
technology | CMOS + |
thread count | 1 + |
transistor count | 37,500,000 + |
word size | 32 bit (4 octets, 8 nibbles) + |