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(in description replaced Cortex-A75 by Cortex-A76)
(Fixed maximum gpu clock according to the kernel source code available at: https://opensource.samsung.com)
 
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{{samsung title|Exynos 990}}
 
{{samsung title|Exynos 990}}
 
{{chip
 
{{chip
−
|name=Exynos 990
+
|name=Exynos 9830
 
|no image=Yes
 
|no image=Yes
 
|designer=Samsung
 
|designer=Samsung
Line 12: Line 12:
 
|family=Exynos
 
|family=Exynos
 
|series=Exynos 9
 
|series=Exynos 9
 +
|frequency=3016 MHz
 +
|frequency 2=2600 MHz
 +
|frequency 3=2106 MHz
 
|isa=ARMv8.2
 
|isa=ARMv8.2
 
|isa family=ARM
 
|isa family=ARM
Line 25: Line 28:
 
|core count=8
 
|core count=8
 
|thread count=8
 
|thread count=8
 +
|max memory=16 GiB
 
|max cpus=1
 
|max cpus=1
−
|max memory=12 GiB
+
|v core min=1,13 V
 +
|v core max=1,20 V
 +
|v io 2=0,9 V
 +
|v io 3=1,0 V
 +
|tdp=8 W
 +
|ctdp down=8 W
 +
|ctdp down frequency=2,730 MHz, 2,500 MHz,
 +
2,000 MHz
 +
|ctdp up=15 W
 +
|ctdp up frequency=3,016 MHz, 2,600 MHz, 2,106 MHz
 +
|tjunc min=115
 +
|tjunc max=115
 
|predecessor=Exynos 9825
 
|predecessor=Exynos 9825
 
|predecessor link=samsung/exynos/9825
 
|predecessor link=samsung/exynos/9825
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}}
 
}}
  
−
For the {{armh|Cortex-A75|l=arch}} cluster:
+
For the {{armh|Cortex-A76|l=arch}} cluster:
  
 
{{cache size
 
{{cache size
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|l2 desc=
 
|l2 desc=
 
}}
 
}}
 +
 +
== NPU ==
 +
The Exynos 990 features Samsung's homegrown NPU. The new NPU features two execution cores. The new NPU is capable of a peaking compute of fifteen trillion operations per second (TOPs).
  
 
== Memory controller ==
 
== Memory controller ==
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| max displays        = 2
 
| max displays        = 2
 
| max memory          =  
 
| max memory          =  
−
| frequency          = ? MHz
+
| frequency          = 832 MHz
 
| max frequency      =  
 
| max frequency      =  
  
Line 187: Line 205:
  
 
== Utilizing devices ==
 
== Utilizing devices ==
−
* [[used by::Samsung Galaxy S11]]
+
* [[used by::Samsung Galaxy S20 Series]]
 +
* [[used by::Samsung Galaxy Note 20 Series]]
 
{{expand list}}
 
{{expand list}}

Latest revision as of 23:28, 7 November 2023

Edit Values
Exynos 9830
General Info
DesignerSamsung,
ARM Holdings
ManufacturerSamsung
Model Number990
MarketMobile
IntroductionOctober 23, 2019 (announced)
2020 (launched)
General Specs
FamilyExynos
SeriesExynos 9
Frequency3016 MHz, 2600 MHz, 2106 MHz
Microarchitecture
ISAARMv8.2 (ARM)
MicroarchitectureMongoose 5, Cortex-A76, Cortex-A55
Core NameMongoose 5, Cortex-A76, Cortex-A55
Process7 nm
TechnologyCMOS
Word Size64 bit
Cores8
Threads8
Max Memory16 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1,13 V-1,20 V
TDP8 W
cTDP down8 W
cTDP down frequency2,730 MHz, 2,500 MHz, 2,000 MHz
cTDP up15 W
cTDP up frequency3,016 MHz, 2,600 MHz, 2,106 MHz
Tjunction115 – 115
Succession

Exynos 990 is a 64-bit octa-core ARM high performance mobile system on a chip designed by Samsung and introduced in 2020. The processor is fabricated on Samsung's 7nm EUV FinFET process and features 8 cores in a tri-cluster configuration consisting of 2 Mongoose 5 big cores, 2 Cortex-A76 middle cores, and 4 Cortex-A55 little cores. This chip supports up to 12 GiB of quad-channel 16-bit LPDDR5-5500 memory and incorporates a Mali-G77 MP11 GPU. The 990 is designed to go along with Exynos Modem 5123 5G modem.

Cache[edit]

Main articles: Mongoose 5 § Cache and Cortex-A76 § Cache

For the Mongoose 5 core cluster:

Symbol version future.svg Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$192 KiB
196,608 B
0.188 MiB
L1I$128 KiB
131,072 B
0.125 MiB
2x64 KiB4-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  2x512 KiB16-way set associative 
L3$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  2x1 MiB  

For the Cortex-A76 cluster:

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
2x64 KiB4-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
2x64 KiB16-way set associative 
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB8-way set associative 


For the Cortex-A55 cluster:

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

NPU[edit]

The Exynos 990 features Samsung's homegrown NPU. The new NPU features two execution cores. The new NPU is capable of a peaking compute of fifteen trillion operations per second (TOPs).

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR5-5500
Supports ECCNo
Max Mem12 GiB
Frequency2750 MHz
Controllers4
Channels4
Width16 bit
Max Bandwidth44 GB/s
40.978 GiB/s
41,961.67 MiB/s
44,000 MB/s
0.04 TiB/s
0.044 TB/s
Bandwidth
Single 11 GiB/s
Double 22 GiB/s
Quad 44 GiB/s

Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUMali-G77
DesignerARM Holdings
Execution Units11Max Displays2
Frequency832 MHz
0.832 GHz
832,000 KHz
OutputDSI
Standards
DirectX12
OpenCL2
OpenGL ES3.2
OpenVG1.1
Vulkan1.0


Codec Encode Decode
HEVC (H.265) ✔ ✔
MPEG-4 AVC (H.264) ✔ ✔
VP9 ✔ ✔

All at 4K UHD 150fps.

ISP[edit]

  • 108MP Rear
  • 24.8MP Front
  • 24.8MP+24.8MP Dual

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported ARM Extensions & Processor Features
NEONAdvanced SIMD extension
CRC32CRC-32 checksum Extension
CryptoCryptographic Extension
FPFloating-point Extension

Utilizing devices[edit]

  • Samsung Galaxy S20 Series
  • Samsung Galaxy Note 20 Series

This list is incomplete; you can help by expanding it.

Retrieved from "https://en.wikichip.org/w/index.php?title=samsung/exynos/990&oldid=101965"
Facts about "Exynos 990 - Samsung"
RDF feed
base frequency3,016 MHz (3.016 GHz, 3,016,000 kHz) +, 2,600 MHz (2.6 GHz, 2,600,000 kHz) + and 2,106 MHz (2.106 GHz, 2,106,000 kHz) +
core count8 +
core nameMongoose 5 +, Cortex-A76 + and Cortex-A55 +
designerSamsung + and ARM Holdings +
familyExynos +
first announcedOctober 23, 2019 +
first launched2020 +
full page namesamsung/exynos/990 +
has ecc memory supportfalse +
instance ofmicroprocessor +
integrated gpuMali-G77 +
integrated gpu base frequency832 MHz (0.832 GHz, 832,000 KHz) +
integrated gpu designerARM Holdings +
integrated gpu execution units11 +
isaARMv8.2 +
isa familyARM +
l1$ size192 KiB (196,608 B, 0.188 MiB) + and 256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative + and 16-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) + and 128 KiB (131,072 B, 0.125 MiB) +
l1i$ description4-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description16-way set associative + and 8-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + and 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldate2020 +
manufacturerSamsung +
market segmentMobile +
max cpu count1 +
max junction temperature115 K (-158.15 °C, -252.67 °F, 207 °R) +
max memory16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) +
max memory bandwidth40.978 GiB/s (41,961.67 MiB/s, 44 GB/s, 44,000 MB/s, 0.04 TiB/s, 0.044 TB/s) +
max memory channels4 +
microarchitectureMongoose 5 +, Cortex-A76 + and Cortex-A55 +
min junction temperature115 K (-158.15 °C, -252.67 °F, 207 °R) +
model number990 +
nameExynos 9830 +
process7 nm (0.007 μm, 7.0e-6 mm) +
seriesExynos 9 +
smp max ways1 +
supported memory typeLPDDR5-5500 +
tdp8 W (8,000 mW, 0.0107 hp, 0.008 kW) +
tdp down8 W (8,000 mW, 0.0107 hp, 0.008 kW) +
tdp up15 W (15,000 mW, 0.0201 hp, 0.015 kW) +
technologyCMOS +
thread count8 +
used bySamsung Galaxy S20 Series + and Samsung Galaxy Note 20 Series +
word size64 bit (8 octets, 16 nibbles) +