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Difference between revisions of "amd/ryzen 5/2600h"
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{{amd title|Ryzen 5 2600H}} | {{amd title|Ryzen 5 2600H}} | ||
{{chip | {{chip | ||
− | |||
|name=Ryzen 5 2600H | |name=Ryzen 5 2600H | ||
|no image=Yes | |no image=Yes | ||
Line 7: | Line 6: | ||
|manufacturer=GlobalFoundries | |manufacturer=GlobalFoundries | ||
|model number=2600H | |model number=2600H | ||
+ | |part number=YM2600C3T4MFB | ||
|market=Mobile | |market=Mobile | ||
+ | |first announced=September 10, 2018 | ||
+ | |first launched=September 10, 2018 | ||
|family=Ryzen 5 | |family=Ryzen 5 | ||
|series=2000H | |series=2000H | ||
Line 33: | Line 35: | ||
|ctdp down=35 W | |ctdp down=35 W | ||
|ctdp up=54 W | |ctdp up=54 W | ||
− | |package | + | |tjunc min=0 °C |
+ | |tjunc max=105 °C | ||
+ | |package name 1=amd,fp5 | ||
}} | }} | ||
− | '''Ryzen 5 2600H''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] mobile microprocessor | + | '''Ryzen 5 2600H''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[AMD]] in late [[2018]]. This processor is based on AMD's {{amd|Zen|Zen microarchitecture|l=arch}} and is fabricated on a [[14 nm process]]. The 2600H operates at a base frequency of 3.2 GHz with a [[TDP]] of 35 W and a {{amd|Precision Boost|Boost}} frequency of 3.6 GHz. This MPU supports up to 32 GiB of dual-channel DDR4-3200 memory and incorporates {{amd|Radeon Vega 8}} Graphics operating at up to 1.1 GHz. |
+ | This processor supports a [[configurable TDP]] down of 35 W and a cTDP up of 54 W. | ||
− | {{ | + | == Cache == |
+ | {{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}} | ||
+ | {{cache size | ||
+ | |l1 cache=384 KiB | ||
+ | |l1i cache=256 KiB | ||
+ | |l1i break=4x64 KiB | ||
+ | |l1i desc=4-way set associative | ||
+ | |l1d cache=128 KiB | ||
+ | |l1d break=4x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l1d policy=write-back | ||
+ | |l2 cache=2 MiB | ||
+ | |l2 break=4x512 KiB | ||
+ | |l2 desc=8-way set associative | ||
+ | |l2 policy=write-back | ||
+ | |l3 cache=4 MiB | ||
+ | |l3 break=1x4 MiB | ||
+ | }} | ||
+ | |||
+ | == Memory controller == | ||
+ | {{memory controller | ||
+ | |type=DDR4-3200 | ||
+ | |ecc=Yes | ||
+ | |max mem=32 GiB | ||
+ | |controllers=2 | ||
+ | |channels=2 | ||
+ | |max bandwidth=47.68 GiB/s | ||
+ | |bandwidth schan=23.84 GiB/s | ||
+ | |bandwidth dchan=47.68 GiB/s | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | This processor has 12 PCIe lanes, 1x8 typically designated for a [[GPU]] and 4 additional lanes for storage (e.g., NVMe). | ||
+ | {{expansions main | ||
+ | | | ||
+ | {{expansions entry | ||
+ | |type=PCIe | ||
+ | |pcie revision=3.0 | ||
+ | |pcie lanes=12 | ||
+ | |pcie config=1x8+1x4 | ||
+ | |pcie config 2=2x4+1x4 | ||
+ | }} | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | {{integrated graphics | ||
+ | | gpu = Radeon Vega 8 | ||
+ | | device id = | ||
+ | | designer = AMD | ||
+ | | execution units = 8 | ||
+ | | unified shaders = 512 | ||
+ | | max displays = | ||
+ | | max memory = | ||
+ | | frequency = | ||
+ | | max frequency = 1,100 MHz | ||
+ | |||
+ | | output crt = | ||
+ | | output sdvo = | ||
+ | | output dsi = | ||
+ | | output edp = | ||
+ | | output dp = Yes | ||
+ | | output hdmi = Yes | ||
+ | | output vga = | ||
+ | | output dvi = | ||
+ | |||
+ | | directx ver = 12 | ||
+ | | opengl ver = 4.6 | ||
+ | | opencl ver = 2.2 | ||
+ | | hdmi ver = | ||
+ | | dp ver = | ||
+ | | edp ver = | ||
+ | | max res hdmi = | ||
+ | | max res hdmi freq = | ||
+ | | max res dp = | ||
+ | | max res dp freq = | ||
+ | | max res edp = | ||
+ | | max res edp freq = | ||
+ | | max res vga = | ||
+ | | max res vga freq = | ||
+ | }} | ||
+ | {{zen with vega hardware accelerated video table|col=1}} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=Yes | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
+ | |avx512f=No | ||
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |abm=Yes | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=Yes | ||
+ | |xop=No | ||
+ | |adx=Yes | ||
+ | |clmul=Yes | ||
+ | |f16c=Yes | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=No | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=No | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=No | ||
+ | |vtd=No | ||
+ | |ept=No | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=Yes | ||
+ | |amdv=Yes | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=Yes | ||
+ | |sensemi=Yes | ||
+ | |xfr=No | ||
+ | |xfr2=No | ||
+ | |mxfr=No | ||
+ | |amdpb=No | ||
+ | |amdpb2=Yes | ||
+ | |amdpbod=No | ||
+ | }} | ||
+ | |||
+ | == Die Shot == | ||
+ | {{further|amd/microarchitectures/zen#Die|l1=Zen § Die Shot}} | ||
+ | * [[14 nm process]] | ||
+ | * 4,950,000,000 transistors | ||
+ | * 209.78 mm² die size | ||
+ | |||
+ | |||
+ | : [[File:raven ridge die.png|650px]] | ||
+ | |||
+ | |||
+ | : [[File:raven ridge die (annotated).png|650px]] |
Latest revision as of 12:14, 18 March 2023
Edit Values | |
Ryzen 5 2600H | |
General Info | |
Designer | AMD |
Manufacturer | GlobalFoundries |
Model Number | 2600H |
Part Number | YM2600C3T4MFB |
Market | Mobile |
Introduction | September 10, 2018 (announced) September 10, 2018 (launched) |
Shop | Amazon |
General Specs | |
Family | Ryzen 5 |
Series | 2000H |
Locked | Yes |
Frequency | 3,200 MHz |
Turbo Frequency | 3,600 MHz (1 core) |
Clock multiplier | 32 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Zen |
Chipset | Promontory |
Core Name | Raven Ridge |
Core Family | 23 |
Core Model | 1 |
Process | 14 nm |
Transistors | 4,950,000,000 |
Technology | CMOS |
Die | 209.78 mm² |
Word Size | 64 bit |
Cores | 4 |
Threads | 8 |
Max Memory | 32 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 45 W |
cTDP down | 35 W |
cTDP up | 54 W |
Tjunction | 0 °C – 105 °C |
Packaging | |
Package | FP5 |
Package Type | Organic Micro Ball Grid Array |
Dimension | 35 mm × 25 mm |
Pitch | 0.7 mm |
Contacts | 1140 |
Ryzen 5 2600H is a 64-bit quad-core mid-range performance x86 mobile microprocessor introduced by AMD in late 2018. This processor is based on AMD's Zen microarchitecture and is fabricated on a 14 nm process. The 2600H operates at a base frequency of 3.2 GHz with a TDP of 35 W and a Boost frequency of 3.6 GHz. This MPU supports up to 32 GiB of dual-channel DDR4-3200 memory and incorporates Radeon Vega 8 Graphics operating at up to 1.1 GHz.
This processor supports a configurable TDP down of 35 W and a cTDP up of 54 W.
Cache[edit]
- Main article: Zen § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
This processor has 12 PCIe lanes, 1x8 typically designated for a GPU and 4 additional lanes for storage (e.g., NVMe).
Expansion Options |
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Graphics[edit]
Integrated Graphics Information
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[Edit] Zen with Radeon Vega Hardware Accelerated Video Capabilities | |||||
---|---|---|---|---|---|
Codec | Encode | Decode | |||
Max FPS | @1080p | @1440p | @2160p | @1080p 4:2:0 | @2160p 4:2:0 |
MPEG-2 (H.262) | 60 FPS | N/A | |||
VC-1 | |||||
VP9 8bpc | 240 FPS | 60 FPS | |||
VP9 10bpc | |||||
MPEG-4 AVC (H.264) 8bpc | 120 FPS | 60 FPS | 30 FPS | ||
MPEG-4 AVC (H.264) 10bpc | |||||
HEVC (H.265) 8bpc | 120 FPS | 60 FPS | 30 FPS | ||
HEVC (H.265) 10bpc | |||||
JPEG/MJPEG 8bpc |
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Die Shot[edit]
- Further information: Zen § Die Shot
- 14 nm process
- 4,950,000,000 transistors
- 209.78 mm² die size
Facts about "Ryzen 5 2600H - AMD"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Ryzen 5 2600H - AMD#pcie + |
base frequency | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
chipset | Promontory + |
clock multiplier | 32 + |
core count | 4 + |
core family | 23 + |
core model | 1 + |
core name | Raven Ridge + |
designer | AMD + |
die area | 209.78 mm² (0.325 in², 2.098 cm², 209,780,000 µm²) + |
family | Ryzen 5 + |
first announced | September 10, 2018 + |
first launched | September 10, 2018 + |
full page name | amd/ryzen 5/2600h + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has amd amd-v technology | true + |
has amd amd-vi technology | true + |
has amd precision boost 2 | true + |
has amd sensemi technology | true + |
has ecc memory support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, SenseMI Technology + and Precision Boost 2 + |
has locked clock multiplier | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | Radeon Vega 8 + |
integrated gpu designer | AMD + |
integrated gpu execution units | 8 + |
integrated gpu max frequency | 1,100 MHz (1.1 GHz, 1,100,000 KHz) + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
ldate | September 10, 2018 + |
manufacturer | GlobalFoundries + |
market segment | Mobile + |
max cpu count | 1 + |
max junction temperature | 378.15 K (105 °C, 221 °F, 680.67 °R) + |
max memory | 32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) + |
max memory bandwidth | 47.68 GiB/s (48,824.32 MiB/s, 51.196 GB/s, 51,196.01 MB/s, 0.0466 TiB/s, 0.0512 TB/s) + |
max memory channels | 2 + |
microarchitecture | Zen + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | 2600H + |
name | Ryzen 5 2600H + |
package | FP5 + |
part number | YM2600C3T4MFB + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
series | 2000H + |
smp max ways | 1 + |
supported memory type | DDR4-3200 + |
tdp | 45 W (45,000 mW, 0.0603 hp, 0.045 kW) + |
tdp down | 35 W (35,000 mW, 0.0469 hp, 0.035 kW) + |
tdp up | 54 W (54,000 mW, 0.0724 hp, 0.054 kW) + |
technology | CMOS + |
thread count | 8 + |
transistor count | 4,950,000,000 + |
turbo frequency (1 core) | 3,600 MHz (3.6 GHz, 3,600,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |