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Godson-2B1
General Info
Designer	Loongson
Manufacturer	SMICS
Model Number	2B1
Market	Desktop
Introduction	2004 (announced) March, 2004 (launched)
General Specs
Family	Godson 2
Series	Godson 2
Frequency	400 MHz
Microarchitecture
ISA	MIPS64 (MIPS)
Microarchitecture	GS464
Core Name	GS464
Process	180 nm
Technology	CMOS
Word Size	64 bit
Cores	1
Threads	1
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Electrical
Power dissipation	4 W

Godson-2B1 (龙芯2B1) is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. Introduced in early 2004, the Godson-2B1 operates at up to 400 MHz consuming up to 4 W. This chip was manufactured on SMICS' 0.18 µm process. This chip reached tapeout on March 7, 2004.

The Godson-2B1 is roughly twice the performance of the 2B.

Cache

Main article: GS464 § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 64 KiB 65,536 B 0.0625 MiB L1I$ 32 KiB 32,768 B 0.0313 MiB 1x32 KiB     L1D$ 32 KiB 32,768 B 0.0313 MiB 1x32 KiB