Edit Values
Xeon W-3275
General Info
Designer	Intel
Manufacturer	Intel
Model Number	W-3275
Part Number	CD8069504153101
S-Spec	SRFFF
Market	Workstation
Introduction	June 3, 2019 (announced) June 3, 2019 (launched)
Release Price	$4,449.00 (tray)
Shop	Amazon
General Specs
Family	Xeon W
Series	W-3200
Locked	Yes
Frequency	2,500 MHz
Turbo Frequency	4,400 MHz (1 core)
Bus type	DMI 3.0
Bus rate	4 × 8 GT/s
Clock multiplier	25
Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Cascade Lake
Core Name	Cascade Lake SP
Core Stepping	B1
Process	14 nm
Technology	CMOS
Word Size	64 bit
Cores	28
Threads	56
Max Memory	1 TiB
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Electrical
TDP	205 W
Packaging
Package	FCLGA-3647 (FCLGA)
Dimension	76.16 mm × 56.6 mm
Pitch	0.8585 mm × 0.9906 mm
Contacts	3647
Socket	Socket P, LGA-3647

W-3275 is a 64-bit 28-core x86 enterprise performance workstation microprocessor introduced by Intel in 2019. This processor is fabricated on an enhanced 14nm++ process based on the Cascade Lake microarchitecture. The W-3275 operates at 2.5 GHz with a TDP of 205 W, a turbo boost frequency of up to 4.4 GHz and a turbo boost max of 4.6 GHz. This chip supports up to 1 TiB of hexa-channel DDR4-2933 memory.

Cache

Main article: Cascade Lake § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 1.75 MiB 1,792 KiB 1,835,008 B L1I$ 896 KiB 917,504 B 0.875 MiB 28x32 KiB 8-way set associative   L1D$ 896 KiB 917,504 B 0.875 MiB 28x32 KiB 8-way set associative write-back L2$ 28 MiB 28,672 KiB 29,360,128 B 0.0273 GiB     28x1 MiB 16-way set associative write-back L3$ 38.5 MiB 39,424 KiB 40,370,176 B 0.0376 GiB     28x1.375 MiB 11-way set associative write-back

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR4-2933 Supports ECC Yes Max Mem 1 TiB Controllers 2 Channels 6 Max Bandwidth 131.13 GiB/s 134,277.12 MiB/s 140.8 GB/s 140,799.765 MB/s 0.128 TiB/s 0.141 TB/s Bandwidth Single 21.86 GiB/s Double 43.71 GiB/s Quad 87.42 GiB/s Hexa 131.13 GiB/s

Expansions

[Edit/Modify Expansions Info]

	Expansion Options
PCIe Revision: 3.0 Max Lanes: 64 Configuration: x16, x8, x4, x1

Frequencies

See also: Intel's CPU Frequency Behavior

[Modify Frequency Info]

Mode	Base	Turbo Frequency/Active Cores
		1	2	3	4	5	6	7	8	9	10	11	12	13	14	15	16	17	18	19	20	21	22	23	24	25	26	27	28
Normal	2,500 MHz	4,600 MHz	4,600 MHz	4,200 MHz	4,200 MHz	4,100 MHz	4,100 MHz	4,100 MHz	4,100 MHz	4,100 MHz	4,100 MHz	4,100 MHz	4,100 MHz	3,900 MHz	3,900 MHz	3,900 MHz	3,900 MHz	3,600 MHz	3,600 MHz	3,600 MHz	3,600 MHz	3,300 MHz	3,300 MHz	3,300 MHz	3,300 MHz	3,200 MHz	3,200 MHz	3,200 MHz	3,200 MHz

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX MMX Extension EMMX Extended MMX Extension SSE Streaming SIMD Extensions SSE2 Streaming SIMD Extensions 2 SSE3 Streaming SIMD Extensions 3 SSSE3 Supplemental SSE3 SSE4.1 Streaming SIMD Extensions 4.1 SSE4.2 Streaming SIMD Extensions 4.2 AVX Advanced Vector Extensions AVX2 Advanced Vector Extensions 2 AVX-512 Advanced Vector 512-bit (2 Units) AVX512F AVX-512 Foundation AVX512CD AVX-512 Conflict Detection AVX512BW AVX-512 Byte and Word AVX512DQ AVX-512 Doubleword and Quadword Instructions AVX512VL AVX-512 Vector Length AVX512_VNNI AVX-512 Vector Neural Network Instructions ABM Advanced Bit Manipulation BMI1 Bit Manipulation Instruction Set 1 BMI2 Bit Manipulation Instruction Set 2 FMA3 3-Operand Fused-Multiply-Add AES AES Encryption Instructions RdRand Hardware RNG ADX Multi-Precision Add-Carry CLMUL Carry-less Multiplication Extension F16C 16-bit Floating Point Conversion x86-16 16-bit x86 x86-32 32-bit x86 x86-64 64-bit x86 Real Real Mode Protected Protected Mode SMM System Management Mode FPU Integrated x87 FPU NX No-eXecute HT Hyper-Threading TBT 2.0 Turbo Boost Technology 2.0 TBMT 3.0 Turbo Boost Max Technology 3.0 EIST Enhanced SpeedStep Technology SST Speed Shift Technology TXT Trusted Execution Technology (SMX) vPro Intel vPro VT-x VT-x (Virtualization) VT-d VT-d (I/O MMU virtualization) EPT Extended Page Tables (SLAT) TSX Transactional Synchronization Extensions MPX Memory Protection Extensions Secure Key Secure Key Technology SMEP OS Guard Technology VMD Volume Management Device DL Boost Deep Learning Boost IPT Identity Protection Technology

Documents

• Xeon W-3200 Series Product Brief