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Xeon Gold 6134 - Intel
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Xeon Gold 6134
General Info
DesignerIntel
ManufacturerIntel
Model Number6134
Part NumberCD8067303330302
S-SpecSR3AR
MarketServer
IntroductionApril 25, 2017 (announced)
General Specs
FamilyXeon Gold
Series6100
LockedYes
Frequency
3.2 GHz
3,200,000 kHz
3,200 MHz
Turbo Frequency
3.7 GHz
3,700,000 kHz
3,700 MHz (1 core)
Bus typeDMI 3.0
Bus rate4 × 
8,000 MT/s
8,000,000 kT/s
8 GT/s
Clock multiplier32
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSkylake
PlatformPurley
ChipsetLewisburg
Core NameSkylake SP
Core SteppingH0
Process14 nm
0.014 μm
1.4e-5 mm
TechnologyCMOS
Word Size
8 octets
16 nibbles
64 bit
Cores18
Threads36
Max CPUs2 (Multiprocessor)
Electrical
TDP
130,000 mW
0.174 hp
0.13 kW
130 W

Xeon Gold 6134 is a 64-bit x86 high-performance server octadeca-core multiprocessor set to be introduced by Intel in the second quarter of 2017. This processor is based on the server configuration of the Skylake microarchitecture (a Skylake SP core) and is manufactured on Intel's 14 nm process. The 6134 operates at 3.2 GHz with a TDP of 130 W and a turbo frequency of 3.7 GHz for a single core.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.

Cache[edit]

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$1.125 MiB
1,152 KiB
1,179,648 B
0.0011 GiB
L1I$576 KiB
0.563 MiB
589,824 B
5.493164e-4 GiB
18x32 KiB8-way set associative 
L1D$576 KiB
0.563 MiB
589,824 B
5.493164e-4 GiB
18x32 KiB8-way set associativewrite-back

L2$18 MiB
18,432 KiB
18,874,368 B
0.0176 GiB
  18x1 MiB16-way set associativewrite-back

L3$24.75 MiB
25,344 KiB
25,952,256 B
0.0242 GiB
  18x1.375 MiB11-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2666
Supports ECCYes
Controllers1
Channels6
Max Bandwidth119.21 GiB/s
Bandwidth
Single 19.89 GiB/s
Double 39.72 GiB/s
Quad 79.47 GiB/s
Hexa 119.21 GiB/s

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
AVX-512Advanced Vector 512-bit
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
EISTEnhanced SpeedStep Technology
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
SMEPOS Guard Technology
base frequency3,200 MHz (3.2 GHz, 3,200,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
chipsetLewisburg +
clock multiplier32 +
core count18 +
core nameSkylake SP +
core steppingH0 +
designerIntel +
first announcedApril 25, 2017 +
full page nameintel/xeon gold/6134 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Transactional Synchronization Extensions + and OS Guard +
has intel enhanced speedstep technologytrue +
has intel supervisor mode execution protectiontrue +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size1.125 MiB (1,152 KiB, 1,179,648 B, 0.0011 GiB) +
l1d$ description8-way set associative +
l1d$ size0.563 MiB (576 KiB, 589,824 B, 5.493164e-4 GiB) +
l1i$ description8-way set associative +
l1i$ size0.563 MiB (576 KiB, 589,824 B, 5.493164e-4 GiB) +
l2$ description16-way set associative +
l2$ size18 MiB (18,432 KiB, 18,874,368 B, 0.0176 GiB) +
l3$ description11-way set associative +
l3$ size24.75 MiB (25,344 KiB, 25,952,256 B, 0.0242 GiB) +
ldate3000 +
manufacturerIntel +
market segmentServer +
max cpu count2 +
microarchitectureSkylake +
microprocessor familyXeon Gold +
microprocessor series6100 +
model number6134 +
nameXeon Gold 6134 +
part numberCD8067303330302 +
platformPurley +
process14 nm (0.014 μm, 1.4e-5 mm) +
s-specSR3AR +
supported memory typeDDR4-2666 +
tdp130 W (130,000 mW, 0.174 hp, 0.13 kW) +
technologyCMOS +
thread count36 +
turbo frequency (1 core)3,700 MHz (3.7 GHz, 3,700,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +