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Ice Lake (server) µarch
General Info
Arch Type	CPU
Designer	Intel
Manufacturer	Intel
Introduction	April, 2021
Process	10 nm +
Core Configs	8, 10, 12, 16, 18, 20, 24, 26, 28, 32, 36, 38, 40
Pipeline
OoOE	Yes
Speculative	Yes
Reg Renaming	Yes
Stages	14-19
Decode	5-way
Instructions
ISA	x86-64
Cache
L1I Cache	32 KiB/core 8-way set associative
L1D Cache	48 KiB/core 12-way set associative
L2 Cache	1.25 MiB/core 20-way set associative
L3 Cache	1.5 MiB/core 12-way set associative
Cores
Core Names	Ice Lake SP, Ice Lake X
Succession
Cascade Lake Sapphire Rapids
Contemporary
Cooper Lake Ice Lake (client)

Ice Lake (ICL, ICX) Server Configuration is Intel's successor to Cascade Lake, a 10 nm microarchitecture for enthusiasts and servers.

Codenames

Core	Abbrev	Target
Ice Lake X	ICL-X	High-end desktops & enthusiasts market
Ice Lake W	ICL-W	Enterprise/Business workstations
Ice Lake SP	ICL-SP	Server Scalable Processors

Release Dates

Cooper Lake and Ice Lake roadmap.

Ice Lake server processors were said to launch in the first half of 2021.

Process Technology

See also: Ice Lake (client) § Process Technology

Ice Lake will use a second-generation enhanced 10 nm process called "10 nm+". Versus the first generation 10nm which was used for Cannon Lake, 10nm+ will feature higher performance through higher drive current for the same power envelope.

Compiler support

Support for Ice Lake was added in LLVM Clang 6.0 and GCC 8.0.

Compiler	Arch-Specific	Arch-Favorable
ICC	-march=icelake-server	-mtune=icelake-server
GCC	-march=icelake-server	-mtune=icelake-server
LLVM	-march=icelake-server	-mtune=icelake-server
Visual Studio	/arch=AVX512	/tune:?

CPUID

Core	Extended Family	Family	Extended Model	Model
?	0	0x6	0x?	?
	Family 6 Model ?
SP	0	0x6	6	A
	Family 6 Model 106

Architecture

Key changes from Cascade Lake

• Enhanced "10nm+" (from 14 nm)
• Sunny Cove core
  • See Sunny Cove for microarchitectural details and changes
• I/O
  • PCIe 4.0 (from PCIe 3.0)
• Memory
  • Higher bandwidth (190.7 GiB/s, up from 143.1 GiB/s)
  • Octa-channel (up from hexa-channel)
  • 3200 MT/s (up from 2933 MT/s)
  • Optane DC DIMMs
    • Apache Pass → Barlow Pass
• Platform
  • Purley → Whitley
• Packaging
  • 4189-contact flip-chip LGA (up from 3647 contacts)

This list is incomplete; you can help by expanding it.

New instructions

Ice Lake introduced a number of new instructions. See Sunny Cove § New Instructions for details.

All Ice Lake Chips

Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.

	List of Ice Lake Processors
	Main processor									Frequency/Turbo		Mem	Major Feature Diff
Model	Launched	Price	Family	Core Name	Cores	Threads	L2$	L3$	TDP	Frequency	Max Turbo	Max Mem	Turbo	SMT
	Uniprocessors
	Multiprocessors (2-way)
	Multiprocessors (4-way)
	Multiprocessors (8-way)
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