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Ryzen 9 4900HS - AMD
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Ryzen 9 4900HS
General Info
DesignerAMD
ManufacturerTSMC
Model Number4900HS
MarketMobile
IntroductionMarch 16, 2020 (announced)
March 16, 2020 (launched)
ShopAmazon
General Specs
FamilyRyzen 9
Series4000
LockedYes
Frequency3,000 MHz
Turbo Frequency4,300 MHz
Clock multiplier30
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen 2
Core NameRenoir
Process7 nm
Transistors9,800,000,000
TechnologyCMOS
Die156 mm²
Word Size64 bit
Cores8
Threads16
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP35 W
Tcase0 °C – 105 °C
Packaging
PackageSocket FP6 (BGA)
Dimension25 mm × 35 mm × 1.38 mm

Ryzen 9 4900HS is a 64-bit octa-core high-end performance x86 mobile microprocessor introduced by AMD in early 2020. Fabricated on TSMC's 7-nanometer process based on AMD's Zen 2 microarchitecture, the 4900HS operates at a base frequency of 3.0 GHz with a TDP of 35 W and a Boost frequency of up to 4.3 GHz. This APU supports up to 64 GiB of DDR4-3200 or up to 32 GiB of quad-channel LPDDR4x-4266 memory. The 4900HS integrates a Radeon Vega 8 Graphics operating at up to 1.75 GHz.

This processor is a lower-power version of the 4900H, featuring slightly lower base and turbo frequencies.

Cache[edit]

Main article: Zen 2 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
L1I$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
8x32 KiB8-way set associative 
L1D$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
8x32 KiB8-way set associativewrite-back

L2$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  8x512 KiB8-way set associativewrite-back

L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  2x4 MiB  

Memory controller[edit]

This SoC features two memory controllers, each supporting DDR4 or LPDDR4x. This chip supports up to 64 GiB of dual-channel DDR4 memory with data rates of up to 3200 MT/s (51.2 GB/s) or up to 32 GiB of quad-channel LPDDR4x with data rates of up to 4266 MT/s (68.27 GB/s).

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-3200, LPDDR4x-4266
Max Mem64 GiB
Controllers2
Channels4
Max Bandwidth68.27 GiB/s
118.79 GB/s
69,908.48 MiB/s
0.0667 TiB/s
0.0733 TB/s
Bandwidth
Single 17.88 GiB/s
Double 34.13 GB/s
Quad 68.27 GB/s

Expansions[edit]

This processor has 16 PCIe lanes, 1x8 designated for a discrete GPU, 1x4 additional lanes for storage (e.g., NVMe), and 1x4 additional lanes reserved for additional peripherals (e.g., WiFi or LTE).

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 16
Configuration: 1x8+1x4+1x4, 2x4+1x4+1x4


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPURadeon Vega 8
DesignerAMD
Execution Units8Max Displays4
Unified Shaders512
Burst Frequency1,750 MHz
1.75 GHz
1,750,000 KHz
OutputDisplayPort, HDMI
[Edit] Zen 2 with Radeon Vega Hardware Accelerated Video Capabilities
Codec Encode Decode
VP9 8bpc/10bpc 1080p240
4K 60 FPS
MPEG-2 (H.262) 8b 1080p240
4K 60 FPS
1080p480
4K 120 FPS
HEVC (H.265) 8bpc/10bpc 1080p240
4K 60 FPS
1080p240
4K 60 FPS

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
SSE4aStreaming SIMD Extensions 4a
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
SHASHA Extensions
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
SMTSimultaneous Multithreading
AMD-ViAMD-Vi (I/O MMU virtualization)
AMD-VAMD Virtualization
SenseMISenseMI Technology

Die[edit]

Main article: Zen 2 § Die

Renoir microprocessors are fabricated on TSMC's 7-nanometer process. This SoC integrates 9.8 billion transistors on a single 156 mm² monolithic die which includes both the Zen 2 CPU cores along with the Vega GPU and various other additional components.


renoir die.png

Facts about "Ryzen 9 4900HS - AMD"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Ryzen 9 4900HS - AMD#pcie +
base frequency3,000 MHz (3 GHz, 3,000,000 kHz) +
clock multiplier30 +
core count8 +
core nameRenoir +
designerAMD +
die area156 mm² (0.242 in², 1.56 cm², 156,000,000 µm²) +
familyRyzen 9 +
first announcedMarch 16, 2020 +
first launchedMarch 16, 2020 +
full page nameamd/ryzen 9/4900hs +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has amd amd-v technologytrue +
has amd amd-vi technologytrue +
has amd sensemi technologytrue +
has ecc memory supportfalse +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension + and SenseMI Technology +
has locked clock multipliertrue +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuRadeon Vega 8 +
integrated gpu designerAMD +
integrated gpu max frequency1,750 MHz (1.75 GHz, 1,750,000 KHz) +
isax86-64 +
isa familyx86 +
l1$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l1d$ description8-way set associative +
l1d$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
l1i$ description8-way set associative +
l1i$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
l2$ description8-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
ldateMarch 16, 2020 +
manufacturerTSMC +
market segmentMobile +
max case temperature378.15 K (105 °C, 221 °F, 680.67 °R) +
max cpu count1 +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth68.27 GiB/s (118.79 GB/s, 69,908.48 MiB/s, 0.0667 TiB/s, 0.0733 TB/s) +
max memory channels4 +
microarchitectureZen 2 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model number4900HS +
nameRyzen 9 4900HS +
packageSocket FP6 +
process7 nm (0.007 μm, 7.0e-6 mm) +
series4000 +
smp max ways1 +
supported memory typeDDR4-3200 + and LPDDR4x-4266 +
tdp35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technologyCMOS +
thread count16 +
transistor count9,800,000,000 +
turbo frequency4,300 MHz (4.3 GHz, 4,300,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +