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K6-2E+/450ICR - AMD
| Edit Values | |
| K6-2E+/450ICR | |
| General Info | |
| Designer | AMD |
| Manufacturer | AMD |
| Model Number | K6-2E+/450ICR |
| Part Number | AMD-K6-2E+/450ICR |
| Market | Embedded |
| Introduction | September 25, 2000 (launched) |
| Shop | Amazon |
| General Specs | |
| Family | K6-2+ |
| Series | K6-2+ Embedded |
| Frequency | 450 MHz |
| Bus type | FSB |
| Bus speed | 100 MHz |
| Bus rate | 100 MT/s |
| Clock multiplier | 4.5 |
| CPUID | 5D4 |
| Microarchitecture | |
| Microarchitecture | K6-III |
| Platform | Super 7 |
| Core Family | 5 |
| Core Model | 13 |
| Core Stepping | 4, 5, 6, 7 |
| Process | 0.18 µm |
| Technology | CMOS |
| Word Size | 32 bit |
| Cores | 1 |
| Threads | 1 |
| Max Memory | 4 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| Power dissipation | 12.65 W |
| Vcore | 2.0 V ± 0.1 V |
| VI/O | 3.3675 V ± 7% |
| TDP | 17.50 W |
| Tcase | 0 °C – 70 °C |
| Packaging | |
| Package | OBGA-349 |
| Package Type | Organic Ball Grid Array |
| Dimension | 25 mm × 25 mm |
| Pitch | 1.27 mm |
| Contacts | 349 |
K6-2E+/450ICR was a 32-bit x86 embedded microprocessor designed by AMD and introduced in late 2000. Based on the K6-III microarchitecture manufactured on a 0.18 µm process, this model operated at 450 MHz with a TDP of 17.5 W.
Contents
Cache[edit]
- Main article: K6-III § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Graphics[edit]
This processor has no integrated graphics processing unit.
Features[edit]
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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- Auto-power down state
- Stop clock state
References[edit]
- "AMD-K6-2E+ Embedded Processor Data Sheet", AMD Publ. #23542, Rev. A, September 2000
- "Embedded AMD-K6™ Processors BIOS Design Guide Application Note", AMD Publ. #23913, Rev. A, November 2000
Facts about "K6-2E+/450ICR - AMD"
| base frequency | 450 MHz (0.45 GHz, 450,000 kHz) + |
| bus rate | 100 MT/s (0.1 GT/s, 100,000 kT/s) + |
| bus speed | 100 MHz (0.1 GHz, 100,000 kHz) + |
| bus type | FSB + |
| clock multiplier | 4.5 + |
| core count | 1 + |
| core family | 5 + |
| core model | 13 + |
| core stepping | 4 +, 5 +, 6 + and 7 + |
| core voltage | 2 V (20 dV, 200 cV, 2,000 mV) + |
| core voltage tolerance | 0.1 V + |
| cpuid | 5D4 + |
| designer | AMD + |
| family | K6-2+ + |
| first launched | September 25, 2000 + |
| full page name | amd/k6-2+/k6-2e+-450icr + |
| has feature | PowerNow! + |
| instance of | microprocessor + |
| io voltage | 3.368 V (33.675 dV, 336.75 cV, 3,367.5 mV) + |
| io voltage tolerance | 7% + |
| l1$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1d$ description | 2-way set associative + |
| l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l1i$ description | 2-way set associative + |
| l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) + |
| ldate | September 25, 2000 + |
| manufacturer | AMD + |
| market segment | Embedded + |
| max case temperature | 343.15 K (70 °C, 158 °F, 617.67 °R) + |
| max cpu count | 1 + |
| max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
| microarchitecture | K6-III + |
| min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| model number | K6-2E+/450ICR + |
| name | K6-2E+/450ICR + |
| package | OBGA-349 + |
| part number | AMD-K6-2E+/450ICR + |
| platform | Super 7 + |
| power dissipation | 12.65 W (12,650 mW, 0.017 hp, 0.0127 kW) + |
| process | 180 nm (0.18 μm, 1.8e-4 mm) + |
| series | K6-2+ Embedded + |
| smp max ways | 1 + |
| tdp | 17.5 W (17,500 mW, 0.0235 hp, 0.0175 kW) + |
| technology | CMOS + |
| thread count | 1 + |
| word size | 32 bit (4 octets, 8 nibbles) + |